Specifications and information are subject to change without notice

WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com, www.TriQuint.com

Page 5 of 6 December 2007

AH103A

High Gain, High Linearity ½-Watt Amplifier

Application Circuit: 2110 – 2170 MHz (AH103AG-PCB2140)

Typical RF Performance at 25°°°°C

Frequency

2140 MHz

Gain

25 dB

Input Return Loss

24 dB

Output Return Loss

11 dB

Output IP3

+45 dBm

Output P1dB

+26.3 dBm

W-CDMA Ch. Power

@ -45 dBc ACPR

+18.5 dBm

Noise Figure

2.9 dB

Supply Voltage

+9 V

Supply Current

275 mA

Notes:

1.

A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first internal amplifier. It is permissible to remove the

regulator and operate the 1

requires a dropping resistor of 6.8 Ω. A +4.5 V supply can also be used to bypass the 6.8 Ω and can be applied to Test Point 2 (TP2).

S-Parameters

22

23

24

25

26

27

2050

2100

2150

2200

2250

Frequency (MHz)

-25

-20

-15

-10

-5

0

S21

S11

S22

Wideband S-Parameters

-30

-20

-10

0

10

20

30

0

500

1000 1500 2000 2500 3000

Frequency (MHz)

S21

S11

S22

Noise Figure

0

1

2

3

4

5

2000

2050

2100

2150

2200

Frequency (MHz)

Output IP3

38

40

42

44

46

48

6

8

10

12

14

16

Output Power per tone (dBm)

ACLR vs. Channel Power

3GPP W-CDMA, Test Model 1+64 DPCH, ±5 MHz offset, 2140 MHz

-60

-55

-50

-45

-40

14

15

16

17

18

19

Output Channel Power (dBm)