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HD74HC393 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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HD74HC393 Datasheet(HTML) 3 Page - Renesas Technology Corp |
3 / 9 page Rev.2.00 Mar 30, 2006 page 1 of 6 HD74HC393 Dual 4-bit Binary Counters REJ03D0625-0200 (Previous ADE-205-504) Rev.2.00 Mar 30, 2006 Description The HD74HC393 contain two 4-bit ripple carry binary counters, which can be cascaded to create a single divide-by-256 counter. The HD74HC393 is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by-N counter configurations. Features • High Speed Operation: t pd (A to QA) = 16 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: V CC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: I CC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74HC393P DILP-14 pin PRDP0014AB-B (DP-14AV) P — HD74HC393FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Clock Clear Outputs X H L H L No change L L No change L No change L Advance to next state Note: 1. H; High level, L; Low level, X; Irrelevant |
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Similar Description - HD74HC393_15 |
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