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R5F3563EDFF Datasheet(PDF) 10 Page - Renesas Technology Corp |
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R5F3563EDFF Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 88 page R01DS0132EJ0120 Rev.1.20 Page 10 of 84 Nov 25, 2011 M16C/5LD Group, M16C/56D Group 1. Overview 1.5 Pin Assignments Figure 1.5 shows the pin assignments for 80-pin package, and Table 1.7 and Table 1.8 list pin names for 80-pin package. Figure 1.5 Pin Assignment for 80-Pin Package (Top View) Set bits PACR2 to PACR0 in the PACR register to 010b before signals are input or output to individual pins after reset. When the PACR register is not set, signals are not input or output for some of the pins. 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 P9_6 / AN2_6 / TXD4 P7_6 / TA3OUT P7_5 / TA2IN / W P9_7 / AN2_7 / RXD4 AVCC VREF P10_0 / AN_0 AVSS P10_1 / AN_1 P10_2 / AN_2 P10_3 / AN_3 P10_4 / AN_4 / KI0 P10_5 / AN_5 / KI1 P10_6 / AN_6 / KI2 P10_7 / AN_7 / KI3 P0_0 / AN0_0 P0_1 / AN0_1 P0_2 / AN0_2 P0_3 / AN0_3 P0_4 / AN0_4 P0_5 / AN0_5 P0_6 / AN0_6 P7_4 / TA2OUT / W P7_3 / CTS2 / RTS2 / TA1IN / V / TXD1 P7_2 / CLK2 / TA1OUT / V / RXD1 P7_1 / RXD2 / SCL2 / TA0IN / CLK1 P7_0 / TXD2 / SDA2 / TA0OUT / CTS1 / RTS1 P6_7 / TXD1 P6_6 / RXD1 P6_5 / CLK1 P6_4 / CTS1 / RTS1 P3_7 P3_6 P3_5 P3_4 P3_3 / CTS3 / RTS3 P3_2 / TXD3 P3_1 / RXD3 P3_0 / CLK3 P6_3 / TXD0 Note: 1. Pins CTX0 and CRX0 are only available in the M16C/5LD Group. PLQP0080KB-A (80P6Q-A) (Top view) M16C/5LD Group M16C/56D Group |
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