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UPC8110GR Datasheet(PDF) 10 Page - NEC |
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UPC8110GR Datasheet(HTML) 10 Page - NEC |
10 / 20 page Preliminary Data Sheet 10 µµµµPC8139GR-7JH PIN FUNCTIONS Pin No. Symbol Applied Voltage (V) Pin Voltage Note (V) Function and Description Internal Equivalent Circuit 23 VPS (RX) 0 to VCC – Power save pin for the receiver block (IF amplifier, RSSI, 2nd down converter). This pin is interlocked to the internal regulator and can control the following. VPS (V) IC stat 2.5 to VCC ON (Active Mode) 0 to 0.3 OFF (Sleep Mode) 23 24 VPS (TX)/ VAGC 0 to VCC – Power save pin for the transmitter block (quadrature modulator, up converter, AGC circuit). This pin is interlocked to the internal regulator and can control the following. VPS (V) IC stat 0.9 to VCC ON (Active Mode) 0 to 0.5 OFF (Sleep Mode) 24 25 VCC5 2.7 to 4.0 – Supply voltage for the AGC block. 26 TX MIX- LOinb – 2.0 Bypass pin for the local input of the up converter. Ground this pin through an external capacitor. 28 TX MIX- LOin – 2.0 Local input pin for the up converter. High impedance input. 26 28 27 GND5 0 – Ground pin for the AGC and up converter. Form as wide a ground pattern as possible to minimize its impedance. 29 VCC6 2.7 to 4.0 – Supply voltage pin for the up converter block. 30 TX MIXout 2.7 to 4.0 – RF output pin for the up converter block. This is an open collector output, so an impedance matching circuit should be attached externally. 29 30 : External attachment Note The pin voltage is measured on Vcc=3.0 V. |
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