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MCTA65P100F1 Datasheet(PDF) 1 Page - Intersil Corporation |
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MCTA65P100F1 Datasheet(HTML) 1 Page - Intersil Corporation |
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1 / 5 page  CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1999 2-13 Semiconductor MCTV65P100F1, MCTA65P100F1 65A, 1000V P-Type MOS Controlled Thyristor (MCT) Package JEDEC STYLE TO-247 JEDEC MO-093AA (5-LEAD TO-218) Symbol GATE GATE RETURN CATHODE ANODE ANODE CATHODE (FLANGE) CATHODE (FLANGE) GATE GATE RETURN CATHODE ANODE ANODE G A K Features • 65A, -1000V •VTM ≤ -1.4V at I = 65A and +150 oC • 2000A Surge Current Capability • 2000A/ µs di/dt Capability • MOS Insulated Gate Control • 100A Gate Turn-Off Capability at +150oC Description The MCT is an MOS Controlled Thyristor designed for switching currents on and off by negative and positive voltage control of an insulated MOS gate. It is designed for use in motor controls, inverters, line switches and other power switching applications. The MCT is especially suited for resonant (zero voltage or zero current switching) applications. The SCR like forward drop greatly reduces conduction power loss. MCTs allow the control of high power circuits with very small amounts of input energy. They feature the high peak current capability common to SCR type thyristors, and operate at junc- tion temperatures up to +150oC with active switching. Formerly TA9900. PART NUMBER INFORMATION PART NUMBER PACKAGE BRAND MCTV65P100F1 TO-247 M65P100F1 MCTA65P100F1 MO-093AA M65P100F1 NOTE: When ordering, use the entire part number. April 1999 Absolute Maximum Ratings TC = +25oC, Unless Otherwise Specified MCTV65P100F1 MCTA65P100F1 UNITS Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM -1000 V Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM +5 V Continuous Cathode Current (See Figure 2) TC = +25 oC (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TC = +90 oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IK25 IK90 85 65 A A Non-Repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITSM 2000 A Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ITC 100 A Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA ±20 V Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGA ±25 V Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt See Figure 11 Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt 2000 A/ µs Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT 208 W Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.67 W/oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to +150 oC Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (0.063" (1.6mm) from case for 10s) TL 260 oC NOTE: 1. Maximum Pulse Width of 200 µs (Half Sine) Assume T J (Initial) = +90 oC and T J (Final) = TJ (Max) = +150 oC File Number 3516.5 PAR T WITHDRA WN PROCESS OBSOLETE - NO NEW DESIGNS |
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