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ADSP-BF549 Datasheet(PDF) 1 Page - Analog Devices |
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ADSP-BF549 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 102 page  Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc. Blackfin Embedded Processor ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549 Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Up to 600 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs RISC-like register and instruction model Wide range of operating voltages and flexible booting options Programmable on-chip voltage regulator 400-ball CSP_BGA, RoHS compliant package MEMORY Up to 324K bytes of on-chip memory comprised of instruction SRAM/cache; dedicated instruction SRAM; data SRAM/cache; dedicated data SRAM; scratchpad SRAM External sync memory controller supporting either DDR SDRAM or mobile DDR SDRAM External async memory controller supporting 8-/16-bit async memories and burst flash devices NAND flash controller 4 memory-to-memory DMA pairs, 2 with ext. requests Memory management unit providing memory protection Code security with Lockbox secure technology and 128-bit AES/ARC4 data encryption One-time-programmable (OTP) memory PERIPHERALS High speed USB On-the-Go (OTG) with integrated PHY SD/SDIO controller ATA/ATAPI-6 controller Up to 4 synchronous serial ports (SPORTs) Up to 3 serial peripheral interfaces (SPI-compatible) Up to 4 UARTs, two with automatic H/W flow control Up to 2 CAN (controller area network) 2.0B interfaces Up to 2 TWI (2-wire interface) controllers 8- or 16-bit asynchronous host DMA interface Multiple enhanced parallel peripheral interfaces (EPPIs), supporting ITU-R BT.656 video formats and 18-/24-bit LCD connections Media transceiver (MXVR) for connection to a MOST network Pixel compositor for overlays, alpha blending, and color conversion Up to eleven 32-bit timers/counters with PWM support Real-time clock (RTC) and watchdog timer Up/down counter with support for rotary encoder Up to 152 general-purpose I/O (GPIOs) On-chip PLL capable of frequency multiplication Debug/JTAG interface Figure 1. ADSP-BF549 Functional Block Diagram CAN (0-1) TWI (0-1) TIMERS(0-10) KEYPAD COUNTER RTC HOST DMA JTAG TEST AND EMULATION UART (2-3) EXTERNAL PORT NOR, DDR, MDDR SPI (2) SPORT (0-1) SD / SDIO WATCHDOG TIMER BOOT ROM 32 16 PIXEL COMPOSITOR VOLTAGE REGULATOR EPPI (0-2) SPORT (2-3) SPI (0-1) UART (0-1) PAB USB 16-BIT DMA 32-BIT DMA INTERRUPTS L2 SRAM L1 INSTR ROM L1 INSTR SRAM L1 DATA SRAM DAB1 DAB0 OTP 16 16 DDR/MDDR ASYNC 16 NAND FLASH CONTROLLER ATAPI MXVR DCB 32 EAB 64 DEB 32 B |
Similar Part No. - ADSP-BF549_15 |
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Similar Description - ADSP-BF549_15 |
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