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ISL6536IB-T Datasheet(PDF) 3 Page - Intersil Corporation |
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ISL6536IB-T Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 6 page 3 FN9114.2 December 28, 2004 Absolute Maximum Ratings Thermal Information VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V VMON, PGOOD, ENABLE. . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV (HBM) Operating Conditions VDD Supply Voltage Range. . . . . . . . . . . . . . . . . . . . . +2.7V to +4V Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C Thermal Resistance (Typical, Note 1) θ JA (°C/W) 8 LD SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board. See Tech Brief TB379 for details. 2. 2. All voltages are relative to GND, unless otherwise specified. Electrical Specifications Nominal VDD = 3.3V, TA = TJ = -40°C - 85°C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT BIAS IC Supply Current IVDD VMON > VMON_L2H 165 1000 µA VDD Power On VDD_L2H VDD low to high 2.6 V VDD Power On Reset VDD_POR VDD high to low 2.4 V PGOOD Pull-Down Current PGpd VPGOOD = 0.5V 2 mA Pull-Up Resistance PGpu 20 k Ω Output Low VPGl VDD= 1V 0.05 0.1 V Delay from VMON Rising TPGdelVMON Last valid input = Vth to PG release 2 µs Delay from EN Rising TPGdelENR EN high to PG release 0.05 µs Delay from EN Falling TPGdelENF EN low to PG pulling low 0.015 µs ENABLE Rising Threshold VEN ENABLE Low to High Threshold 0.4VDD 0.5VDD 0.6VDD V Threshold Hysteresis VEN_HYS 0.065 V Pull-up Current IENpu VEN = 0.5V 10 µA VMON Input Falling Threshold 3.3VMON_H2L Tj=+25c 0.623 0.633 0.643 V Falling Threshold Temp Coeff. 3.3VMON_TC 100 uV/°C Hysteresis VVMON_HYS -10 - mV Range VMON_RNG -8 - mV Glitch Filter Duration TFIL VMON glitch to PGOOD low Filter - 30 - µs ISL6536 |
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