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R1QPA4436RBG-30IA0 Datasheet(PDF) 4 Page - Renesas Technology Corp

Part # R1QPA4436RBG-30IA0
Description  144-Mbit QDR?줚I SRAM 2-word Burst Architecture (2.0 Cycle Read latency) with ODT
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R1QPA4436RBG-30IA0 Datasheet(HTML) 4 Page - Renesas Technology Corp

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R1QPA4436RBG,R1QPA4418RBG
Datasheet
R10DS0147EJ0200 Rev.2.00
Page 4 of 30
Aug 01, 2014
Pin Arrangement
[R1QPA4436RBG]
4M x 36
(Top View)
1
2
3
4
5
6
7
8
9
10
11
A
/CQ
NC
SA
/W
/BW2
/K
/BW1
/R
SA
SA
CQ
B
Q27
Q18
D18
SA
/BW3
K
/BW0
SA
D17
Q17
Q8
C
D27
Q28
D19
VSS
SA
SA
SA
VSS
D16
Q7
D8
D
D28
D20
Q19
VSS
VSS
VSS
VSS
VSS
Q16
D15
D7
E
Q29
D29
Q20
VDDQ
VSS
VSS
VSS
VDDQ
Q15
D6
Q6
F
Q30
Q21
D21
VDDQ
VDD
VSS
VDD
VDDQ
D14
Q14
Q5
G
D30
D22
Q22
VDDQ
VDD
VSS
VDD
VDDQ
Q13
D13
D5
H
/DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
D31
Q31
D23
VDDQ
VDD
VSS
VDD
VDDQ
D12
Q4
D4
K
Q32
D32
Q23
VDDQ
VDD
VSS
VDD
VDDQ
Q12
D3
Q3
L
Q33
Q24
D24
VDDQ
VSS
VSS
VSS
VDDQ
D11
Q11
Q2
M
D33
Q34
D25
VSS
VSS
VSS
VSS
VSS
D10
Q1
D2
N
D34
D26
Q25
VSS
SA
SA
SA
VSS
Q10
D9
D1
P
Q35
D35
Q26
SA
SA
QVLD
SA
SA
Q9
D0
Q0
R
TDO
TCK
SA
SA
SA
ODT
SA
SA
SA
TMS
TDI
Notes: 1.
Address expansion order for future higher density SRAMs: 10A → 2A → 7A → 5B.
2.
NC pins can be left floating or connected to 0V to VDDQ


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