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IH6108CPE Datasheet(PDF) 4 Page - Intersil Corporation |
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IH6108CPE Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 9 page 12-131 IH6108 Application Information ENABLE Input Strobing Levels The ENABLE input on the IH6108 requires a minimum of +4.5V to trigger to the “1” state and a maximum of +0.8V to trigger to the “0” state. If the ENABLE input is being driven from TTL logic, a pull-up resistor of 1k to 3k Ω is required from the gate output to +5V supply. (See Figure 4.) When the EN input is driven from CMOS logic, no pullup is necessary, see Figure 5. The supply voltage of the CD4009 affects the switching speed of the IH6108; the same is true for TTL supply voltage levels. The following chart shows the effect, on ttrans for a supply varying from +4.5V to +5.5V. The throughput rate can therefore be maximized by using a +5V to +5.5V supply for the ENABLE Strobe Logic. The examples shown in Figures 4 and 5 deal with ENABLE strobing when expansion to more than eight channels is required. In these cases the EN terminal acts as a fourth address input. If eight channels or less are being multi- plexed, the EN terminal can be directly connected to +5V logic supply to enable the IH6108 at all times. Using the IH6108 with Supplies Other Than ±15V The IH6108 can be used with power supplies ranging from ±6V to ±16V. The switch rDS(ON) will increase as the supply voltages decrease, however, the multiplexer error term (the product of leakage times rDS(ON)) will remain approximately constant since leakage decreases as the supply voltages are reduced. Caution must be taken to ensure that the enable (EN) voltage is at least 0.7V below V+ at all times. If this is not done, the Address input strobing levels will not function properly. This may be achieved quite simply by connecting EN (pin 2) to V+ (pin 13) via a silicon diode as shown in Figure 6. When using this type of configuration, a further requirement must be met: the strobe levels of A0 and A1 must be within 2.5V of the EN voltage in order to define a binary “1” state. For the case shown in Figure 6 the EN volt- age is 11.3V which means that logic high at A0 and A1 is +8.8V (logic low continues to be 0.8V). In this configuration the IH6108 cannot be driven by TTL (+5V) or CMOS (+5V) logic. It can be driven by TTL open collector logic or CMOS logic with +12V supplies. If the logic and the IH6108 have common supplies, the EN pin should again be connected to the supply through a silicon diode. In this case, tying EN to the logic supply directly will not work since it violates the 0.7V differential voltage required between V+ and EN, (See Figure 7). A 1 µF capacitor can be placed across the diode to minimize switching glitches. FIGURE 2. tOPEN (BREAK-BEFORE-MAKE) SWITCHING TEST CIRCUIT AND WAVEFORMS FIGURE 3. tON AND tOFF SWITCHING TEST CIRCUIT AND WAVEFORMS Switching Information (Continued) -2V S2 THRU S7 S8 A2 A1 A0 +15V -15V D VOUT IH6108 EN 35pF V- GND VA 200 Ω +5V S1 3V 0.8V tOPEN VA tr < 100ns tf < 100ns 0.8V S1 ON S8 ON 50% 50% tOPEN VS1 = -2V VOUT VS1 S2 THRU S8 A2 A1 A0 +15V -15V VOUT IH6108 EN 35pF GND VEN 1k Ω S1 OUT 5V 0.8V VEN tr < 100ns tf < 100ns 0V 50% tEN(OFF) VS1 = -2V VOUT 90% tEN(ON) 10% CMOS OR TTL SUPPLY VOLTAGE TYPICAL TTRANS AT 25oC +4.5V 400ns +4.75V 300ns +5.00V 250ns +5.25V 200ns +5.50V 175ns IH6108 |
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