9

Definition of Terms

Nonlinearity - Error contributed by deviation of the DAC

transfer function from a straight line through the end points of

the actual plot of transfer function. Normally expressed as a

percentage of full scale range or in (sub)multiples of 1 LSB.

Resolution - It is addressing the smallest distinct analog out-

put change that a D/A converter can produce. It is commonly

expressed as the number of converter bits. A converter with

olution by no means implies linearity.

Settling Time - Time required for the output of a DAC to

settle to within specified error band around its final value

(e.g. 1/2 LSB) for a given digital input change, i.e. all digital

inputs LOW to HIGH and HIGH to LOW.

Gain Error - The difference between actual and ideal analog

output values at full-scale range, i.e., all digital inputs at

HIGH state. It is expressed as a percentage of full-scale

range or in (sub)multiples of 1 LSB.

Feedthrough Error - Error caused by capacitive coupling

ground.

terminal when all DAC register outputs are LOW.

Detailed Description

The ICL7134 consists of 14-bit primary DAC, two PROM

controlled correction DACs, input buffer registers, and

microprocessor interface logic (See Functional Block

Diagram). The 14-bit primary DAC is an R-2R thin film

resistor ladder with N-channel MOS SPDT current steering

switches. Precise balancing of the switch resistances, and

all other resistances in the ladder, results in excellent

temperature stability.

True 14-bit linearity is achieved by programming a floating poly-

silicon gate PROM array which controls two correction DAC cir-

cuits. A 6-bit gain correction DAC, or G-DAC, diverts up to 2%

of the feedback resistor’s current to Analog GND and reduces

the gain error to less than 1 LSB, or 0.006%. The 5 most

significant outputs of the DAC register address a 31-word

PROM array that controls a 12-bit linearity correction DAC, or

C-DAC. For every combination of the primary DAC’s 5 most

significant bits, a different C-DAC code is selected. This allows

correction of superposition errors, caused by bit interaction on

the primary resistor ladder’s current output bus and by voltage

non-linearity in the feedback resistor. Superposition errors can-

not be corrected by any method which corrects individual bits

only, such as laser trimming. Since the PROM programming

occurs in packaged form, it corrects for resistor shifts caused by

the thermal stresses of packaging. These packaging shifts limit

the accuracy that can be achieved using wafer level correction

methods such as laser trimming, which has also been found to

degrade the time stability of thin film resistors at the 14-bit level.

Analog Section

The ICL7134 inherently provides both unipolar and bipolar

operation. The bipolar application circuit (Figure 6) requires

one additional op-amp but no external resistors. The two on-

form a voltage inverter which drives the MSG reference ter-

necessary so that the gain error can be corrected. This

reverses the weight of the MSG, and gives the DAC a 2’s

complement transfer function. The op-amp and reference

affecting linearity, but a small gain error will be introduced.

Since the PROM correction codes required are different for

bipolar and unipolar operation, the ICL7134 is available in

two different versions; the ICL7134U, which is corrected for

unipolar operation, and the ICL7134B, which is programmed

for bipolar application. The feedback resistance is also differ-

ent in the two versions, and is switched under PROM control

from ‘R’ in the unipolar device to ‘2R’ in the bipolar part.

These feedback resistors have a dummy (always ON) switch

in series to compensate for the effect of the ladder switches.

This greatly improves the gain temperature coefficient and

the power supply rejection of the device.

ICL7134