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HS4-3282-8 Datasheet(PDF) 4 Page - Intersil Corporation |
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HS4-3282-8 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 15 page 5-186 Pinout 31 429D0 Transmitter Data output from Transmitter 32 429D0 Transmitter Data output from Transmitter. 33 ENTX Transmitter Transmitter Enable input signal to initiate data transmission from FIFO memory. 34 CWSTR Recs/Trans Control word input strobe signal to latch the control word from the databus into the control word register. 35 - - No connection. Must be left open. 36 - - No connection. Must be left open or tied low but never tied high. 37 CLK Recs/Trans External clock input. May be either ten (10) or eighty (80) times the data rate. If using both ARINC data rates it must be ten (10) times the highest data rate, (typically 1MHz). 38 TXCLK Transmitter Transmitter Clock output. Delivers a clock frequency equal to the transmitter data rate. 39 MR Recs/Trans Master Reset. Active low pulse used to reset FIFO, bit counters, gap timer, word count signal, TX/R and various other flags and controls. Master reset does not reset the control word register. Usually only used on Power-Up or System Reset. 40 - - No Connection. Pin Description (Continued) PIN SYMBOL SECTION DESCRIPTION 28 40 39 38 37 36 35 34 33 32 31 30 29 27 26 25 24 23 22 21 13 1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 18 19 20 NC NC NC HS-3282 |
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Similar Description - HS4-3282-8 |
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