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HIP4086AP Datasheet(PDF) 6 Page - Intersil Corporation |
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HIP4086AP Datasheet(HTML) 6 Page - Intersil Corporation |
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6 / 9 page  6 HIP4086 Timing Diagrams FIGURE 1. FIGURE 2. DISABLE FUNCTION NOTES: 4. X means any “A”, “B”, or “C” phase. 5. With RDEL resistor tied to VDD, lowers and uppers cannot be turned on at the same time. Low side logic overrides high side logic unless RDEL < 100mV. XLI XHI XLO XHO XLO XHO DEAD TIME DEAD TIME (RDEL = VSS) LOWER LOWER UPPER UPPER (RDEL = VSS) TURN-ON TURN-OFF TURN-ON TURN-OFF DIS OR UV XHI, XLI XLO XHO DISABLE TO LOWER DISABLE TURN-OFF DISABLE TO UPPER REFRESH TURN-ON PROP DELAY PULSE WIDTH PROP DELAY (UPPERS) ENABLE HIP4086 |
Similar Part No. - HIP4086AP |
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Similar Description - HIP4086AP |
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