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HI7106C Datasheet(PDF) 7 Page - Intersil Corporation

Part # HI7106C
Description  3 1/2 Digit, LCD/LED Display, A/D Converter
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HI7106C Datasheet(HTML) 7 Page - Intersil Corporation

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7
System Timing
Figure 7 shows the clocking arrangement used in the
HI7106. Two basic clocking arrangements can be used:
• Figure 7A. An external oscillator connected to pin 40.
• Figure 7B. An R-C oscillator using all three pins.
The oscillator frequency is divided by four before it clocks the
decade counters. It is then further divided to form the three
convert-cycle phases. These are signal integrate (1000
counts), reference de-integrate (0 to 2000 counts) and
auto-zero (1000 to 3000 counts). For signals less than full
scale, auto-zero gets the unused portion of reference de-inte-
grate. This makes a complete measure cycle of 4,000 counts
(16,000 clock pulses) independent of input voltage. For three
readings/second, an oscillator frequency of 48kHz would be
used.
To achieve maximum rejection of 60Hz pickup, the signal
integrate cycle should be a multiple of 60Hz. Oscillator
frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz,
40kHz, 331/3kHz, etc. should be selected. For 50Hz rejec-
tion, Oscillator frequencies of 200kHz, 100kHz, 662/3kHz,
50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5
readings/second) will reject both 50Hz and 60Hz (also
400Hz and 440Hz).
Component Value Selection
Integrating Resistor
Both the buffer amplifier and the integrator have a class A
output stage with 100
µA of quiescent current. They can
supply 4
µA of drive current with negligible nonlinearity. The
integrating resistor should be large enough to remain in this
very linear region over the input voltage range, but small
enough that undue leakage requirements are not placed on
the PC board. For 2V full scale, 470k
Ω is near optimum and
similarly a 47k
Ω for a 200mV scale.
Integrating Capacitor
The integrating capacitor should be selected to give the
maximum voltage swing that ensures tolerance buildup will
not saturate the integrator swing (approximately. 0.3V from
either supply). In the HI7106, when the analog COMMON is
used as a reference, a nominal +2V full- scale integrator
swing is fine. For three readings/second (48kHz clock) nomi-
nal values for ClNT are 0.22µF and 0.10µF, respectively. Of
course, if different oscillator frequencies are used, these val-
ues should be changed in inverse proportion to maintain the
same output swing.
An additional requirement of the integrating capacitor is that
it must have a low dielectric absorption to prevent roll-over
errors. While other types of capacitors are adequate for this
application, polypropylene capacitors give undetectable
errors at reasonable cost.
Auto-Zero Capacitor
The size of the auto-zero capacitor has some influence on
the noise of the system. For 200mV full scale where noise is
very important, a 0.47
µF capacitor is recommended. On the
2V scale, a 0.047
µF capacitor increases the speed of recov-
ery from overload and is adequate for noise on this scale.
Reference Capacitor
A 0.1
µF capacitor gives good results in most applications.
However, where a large common mode voltage exists (i.e.,
the REF LO pin is not at analog COMMON) and a 200mV
scale is used, a larger value is required to prevent roll-over
error. Generally 1
µF will hold the roll-over error to 0.5 count
in this instance.
Oscillator Components
For all ranges of frequency a 100k
Ω resistor is recommended
and the capacitor is selected from the equation:
Reference Voltage
The analog input required to generate full scale output (2000
counts) is: VlN =2VREF. Thus, for the 200mV and 2V scale,
VREF should equal 100mV and 1V, respectively. However, in
many applications where the A/D is connected to a
transducer, there will exist a scale factor other than unity
between the input voltage and the digital reading. For
instance, in a weighing system, the designer might like to
have a full scale reading when the voltage from the
transducer is 0.662V. Instead of dividing the input down to
200mV, the designer should use the input voltage directly
CLOCK
INTERNAL TO PART
40
39
38
÷4
CLOCK
INTERNAL TO PART
40
39
38
÷4
RC OSCILLATOR
R
C
TEST HI7106
FIGURE 7B.
FIGURE 7. CLOCK CIRCUITS
FIGURE 7A.
f
0.45
RC
-----------
For 48kHz Clock (3 Readings/sec),
=
C
100pF.
=
HI7106


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