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AD9516-3 Datasheet(PDF) 2 Page - Analog Devices

Part # AD9516-3
Description  14-Output Clock Generator with Integrated 2.0 GHz VCO
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9516-3 Datasheet(HTML) 2 Page - Analog Devices

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AD9516-3
Data Sheet
Rev. C | Page 2 of 80
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Power Supply Requirements ....................................................... 4
PLL Characteristics ...................................................................... 4
Clock Inputs .................................................................................. 6
Clock Outputs............................................................................... 6
Timing Characteristics ................................................................ 7
Clock Output Additive Phase Noise (Distribution Only; VCO
Divider Not Used) ........................................................................ 8
Clock Output Absolute Phase Noise (Internal VCO Used).... 9
Clock Output Absolute Time Jitter (Clock Generation Using
Internal VCO)............................................................................. 10
Clock Output Absolute Time Jitter (Clock Cleanup Using
Internal VCO)............................................................................. 10
Clock Output Absolute Time Jitter (Clock Generation Using
External VCXO) ......................................................................... 10
Clock Output Additive Time Jitter (VCO Divider Not Used)
....................................................................................................... 11
Clock Output Additive Time Jitter (VCO Divider Used) ..... 11
Delay Block Additive Time Jitter.............................................. 12
Serial Control Port ..................................................................... 12
PD, RESET, and SYNC Pins ..................................................... 13
LD, STATUS, and REFMON Pins............................................ 13
Power Dissipation....................................................................... 14
Timing Diagrams............................................................................ 15
Absolute Maximum Ratings.......................................................... 16
Thermal Resistance.................................................................... 16
ESD Caution................................................................................ 16
Pin Configuration and Function Descriptions........................... 17
Typical Performance Characteristics ........................................... 19
Terminology.................................................................................... 25
Detailed Block Diagram ................................................................ 26
Theory of Operation ...................................................................... 27
Operational Configurations...................................................... 27
Digital Lock Detect (DLD) ....................................................... 36
Clock Distribution ..................................................................... 40
Reset Modes ................................................................................ 48
Power-Down Modes .................................................................. 49
Serial Control Port ......................................................................... 50
Serial Control Port Pin Descriptions....................................... 50
General Operation of Serial Control Port............................... 50
The Instruction Word (16 Bits)................................................ 51
MSB/LSB First Transfers ........................................................... 51
Thermal Performance.................................................................... 54
Register Map Overview ................................................................. 55
Register Map Descriptions ............................................................ 59
Applications Information .............................................................. 77
Frequency Planning Using the AD9516.................................. 77
Using the AD9516 Outputs for ADC Clock Applications.... 77
LVPECL Clock Distribution..................................................... 78
LVDS Clock Distribution.......................................................... 78
CMOS Clock Distribution ........................................................ 79
Outline Dimensions....................................................................... 80
Ordering Guide .......................................................................... 80


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