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HCS161HMSR Datasheet(PDF) 1 Page - Intersil Corporation |
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HCS161HMSR Datasheet(HTML) 1 Page - Intersil Corporation |
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1 / 9 page  193 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 HCS161MS Radiation Hardened Synchronous Counter Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 CP P0 P1 P2 P3 GND PE Q0 Q1 Q2 Q3 TE TC MR VCC SPEN 2 3 4 5 6 7 8 116 15 14 13 12 11 10 9 CP P0 P1 P2 P3 GND PE MR Q0 Q1 Q2 Q3 TE TC VCC SPE Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Cosmic Ray Upset Immunity 2 x 10-9 Error/Bit Day (Typ) • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • Input Logic Levels - VIL = 0.3 VCC Max - VIH = 0.7 VCC Min • Input Current Levels Ii ≤ 5µA at VOL, VOH Description The Intersil HCS161MS is a Radiation Hardened 4-Input Binary; synchronous counter featuring asynchronous reset and look- ahead carry logic. The HCS161 has an active-low master reset to zero, MR. A low level at the synchronous parallel enable, SPE, disables counting and allows data at the preset inputs (p0 - p3) to load the counter. The data is latched to the outputs on the posi- tive edge of the clock input, CP. The HCS161MS has two count output, IC. The terminal count output indicates a maximum count for one clock pulse and is used to enable the next cascaded stage to count. The HCS161MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS161MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). September 1995 Spec Number 518755 File Number 2469.2 Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE HCS161DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP HCS161KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack HCS161D/Sample +25oC Sample 16 Lead SBDIP HCS161K/Sample +25oC Sample 16 Lead Ceramic Flatpack HCS161HMSR +25oC Die Die |
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