11

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCS112DMSR

Intersil Class S Equivalent

16 Lead SBDIP

HCS112KMSR

Intersil Class S Equivalent

16 Lead Ceramic Flatpack

HCS112D/Sample

Sample

16 Lead SBDIP

HCS112K/Sample

Sample

16 Lead Ceramic Flatpack

HCS112HMSR

Die

Die

HCS112MS

Radiation Hardened

Dual JK Flip-Flop

Pinouts

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T16, LEAD FINISH C

TOP VIEW

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F16, LEAD FINISH C

TOP VIEW

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

CP1

KA

JA

SA

QA

QA

GND

QB

VCC

RB

CPB

KB

JB

SB

QB

RA

CP1

KA

JA

SA

QA

QA

QB

GND

2

3

4

5

6

7

8

116

15

14

13

12

11

10

9

VCC

RA

RB

CPB

KB

JB

SB

QB

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

Bit-Day (Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCS112MS is a Radiation Hardened dual JK

flip-flop with set and reset. The output changes state on the

negative going transition of the clock pulse. Set and reset

are accomplished asynchronously by a logic low input level.

The HCS112MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS112MS is supplied in a 16 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

September 1995

Spec Number

518830

File Number

3558.1