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HA3-4905-5 Datasheet(PDF) 4 Page - Intersil Corporation |
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HA3-4905-5 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 8 page 4 Applying the HA-4900 Series Comparators Supply Connections This device is exceptionally versatile in working with most available power supplies. The voltage applied to the V+ and V- terminals determines the allowable input signal range; while the voltage applied to the VL+ and VL- determines the output swing. In systems where dual analog supplies are available, these would be connected to V+ and V-, while the logic supply and return would be connected to VLOGIC+ and VLOGIC-. The analog and logic supply commons can be connected together at one point in the system, since the comparator is immune to noise on the logic supply ground. A negative output swing may be obtained by connecting VL+ to ground and VL- to a negative supply. Bipolar output swings (15VP-P, Max) may be obtained using dual supplies. In systems where only a single logic supply is available (+5V to 15V), V+ and VLOGIC+ may be connected together to the positive supply while V- and VLOGIC- are grounded. If an input signal could swing negative with respect the V- terminal, a resistor should be connected in series with the input to limit input current to < 5mA since the C-B junction of the input transistor would be forward biased. Unused Inputs Inputs of unused comparator sections should be tied to a differential voltage source to prevent output “chatter.” Crosstalk Simultaneous high frequency operation of all other channels in the package will not affect the output logic state of a given channel, provided that its differential input voltage is sufficient to define a given logic state ( ∆VIN ≥±VOS). Low level or high impedance input lines should be shielded from other signal sources to reduce crosstalk and interference. Power Supply Decoupling Decouple all power supply lines with 0.01 µF ceramic capacitors to ground line located near the package to reduce coupling between channels or from external sources. Response Time Fast rise time (<200ns) input pulses of several volts amplitude may result in delay times somewhat longer than those illustrated for 100mV steps. Operating speed is optimized by limiting the maximum differential input voltage applied, with resistor-diode clamping networks. Typical Applications Data Acquisition System In this circuit the HA-4900 series is used in conjunction with a D to A converter to form a simple, versatile, multi-channel analog input for a data acquisition system. In operation the processor first sends an address to the D to A, then the processor reads the digital word generated by the comparator outputs. To perform a simple comparison, the processor sets the D to A to a given reference level, then examines one or more comparator outputs to determine if their inputs are above or below the reference. A window comparison consists of two such cycles with 2 reference levels set by the D to A. One way to digitize the inputs would be for the processor to increment the D to A in steps. The D to A address, as each comparator switches, is the digitized level of the input. While stairstepping the D to A is slower than successive approximation, all channels are digitized during one staircase ramp. Schematic Diagram Q9D BIAS 2 ONE FOURTH ONLY R20D 1k Ω R20C 1k Ω R20B 1k Ω R20A 1k Ω Q9C Q9B Q9A R21 1k Ω Q10 D9A BIAS 1 Q5 Q4 D4A D4B Q4C Q3 R16 540 Ω PR1 200k Ω R10 4k Ω Q2 Q1 R9 4k Ω BIAS 3 BIAS 4 Q11 +IN Q17 Q18 Q12 Q13 R1 500 Ω R2 13k Ω R3 1k Ω Q19 Q20 Q14 R4 1k Ω Q21 Q22 -IN MN1 R7 2.5k Ω R6 2.5k Ω Q16 Q7 Q23 R5 360 Ω MN2 MN3 Q24 Q25 R18 664 Ω Q38 MN4 D45 D11A Q26 R17 19k Ω R14 5k Ω Q33 Q34 Q36 Q37 Q30 Q28 R11 8k Ω R15 8k Ω Q31 R23 100 Ω R24 14k Ω D29B Q29 Q29A R22 100 Ω R12 8k Ω Q32 MN6 MN5 VLOGIC- OUT VLOGIC+ V- V+ Q15 D35 D39 HA-4900, HA-4902, HA-4905 |
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Similar Description - HA3-4905-5 |
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