AD8385

Rev. 0 | Page 10 of 24

Pin Name

Function

Description

SCL

Serial Interface Data

Clock

Clock for the Serial Interface.

SDI

Serial Interface Data

Input

While the SEN input is low, one 12-bit serial word is loaded into the serial interface on the rising

edges of SCL. The first four bits select the function; the following eight bits are the data used in the

serial DACs.

SEN

Serial Interface

Enable

A falling edge of this input initiates a loading cycle. While this input is held low, the serial interface

is enabled and data is loaded on every rising edge of SCL. The selected functions are updated on

the rising edge of this input. While this input is held high, the serial interface is disabled.

VAO1, VAO2

Serial DAC Voltage

Output

These output voltages are updated on the rising edge of the SEN input.

TSTM

Test Mode

When this input is low, the overload protection and output mode are determined by the function

programmed into the serial interface. While this input is held high, the overload protection is

forced to enabled and the output mode is forced to normal, regardless of function programmed

into the serial interface.

TSTA

Test Pin

Connect this pin to DGND.

MONITI

Monitor Input

Logic Input of the Level Shifting Inverting Edge Detector.

MONITO

Monitor Output

Output of the Level Shifting Inverting Edge Detector.

DYIN, DIRYIN,

DIRXIN, DXIN,

NRGIN,

ENBX(1–4)IN

Inverting Level

Shifter Inputs

Logic Input of the Inverting Level Shifters.

DX, DY, DIRX,

DIRY, NRG,

ENBX(1–4)

Inverting Level

Shifter Outputs

While the corresponding input voltage of these level shifters is below the threshold voltage, the

output voltage at these pins is at VOH. While the corresponding input voltage of these level

shifters is above the threshold voltage, the output voltage at these pins is at VOL.

CLXIN, CLYIN

Complementary

Level Shifter Inputs

Logic Input of the Complementary Level Shifters.

CLX, CLXN,

CLY, CLYN,

Complementary

Level Shifter

Outputs

While the corresponding input voltage of these level shifters is below the threshold voltage, the

voltage at the noninverting output pins is at VOH and the voltage at the inverting outputs is at

VOL. While the corresponding input voltage of these level shifters is above the threshold voltage,

the voltage at the noninverting output pins is at VOL and the voltage at the inverting outputs is at

VOH.