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CD4503BMS Datasheet(PDF) 7 Page - Intersil Corporation |
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CD4503BMS Datasheet(HTML) 7 Page - Intersil Corporation |
7 / 8 page 4-7 FIGURE 6. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE FIGURE 8. TYPICAL POWER DISSIPATION AS A FUNCTION OF FREQUENCY Chip Dimensions and Pad Layout Typical Performance Characteristics (Continued) AMBIENT TEMPERATURE (TA) = +25 oC 175 150 125 100 75 50 25 0102030405060708090100 LOAD CAPACITANCE (CL) (pF) VDD = 5V VDD = 10V VDD = 15V tPLH tPHL LOAD CAPACITANCE (CL) (pF) 020 20 40 60 80 100 40 60 5V (tTLH) 10V (tTLH) 10V (tTHL) 15V (tTLH) 15V (tTHL) 5V (tTHL) AMBIENT TEMPERATURE (TA) = +25 oC 10 30 50 70 90 10 30 50 70 CL = 15pF CL = 50pF AMBIENT TEMPERATURE (TA) = +25 oC 8 6 4 28 6 4 22 FREQUENCY (f) (kHz) 110 102 103 104 8 6 4 28 6 4 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 10K 1K 100 10 tr = tf = 20ns VDD = 15V VDD = 10V VDD = 5V Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). METALLIZATION: Thickness: 11k Å − 14kÅ, AL. PASSIVATION: 10.4kÅ - 15.6k Å, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches CD4503BMS |
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