7-482

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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CD4098BMS

CMOS Dual Monostable Multivibrator

Description

CD4098BMS dual monostable multivibrator provides stable

retriggerable/resettable one shot operation for any fixed volt-

age timing application.

An external resistor (RX) and an external capacitor (CX)

control the timing for the circuit. Adjustment of RX and CX

provides a wide range of output pulse widths from the Q and

Q terminals. The time delay from trigger input to output

transition (trigger propagation delay) and the time delay from

reset input to output transition (reset propagation delay) are

independent of RX and CX.

Leading edge triggering (+TR) and trailing edge triggering

(-TR) inputs are provided for triggering from either edge of

an input pulse. An unused +TR input should be tied to VSS.

An unused -TR input should be tied to VDD. A RESET (on

low level) is provided for immediate termination of the output

pulse or to prevent output pulses when power is turned on.

An unused RESET input should be tied to VDD. However, if

an entire section of the CD4098BMS is not used, its RESET

should be tied to VSS. See Table 9.

In normal operation the circuit triggers (extends the output

pulse one period) on the application of each new trigger

pulse. For operation in the non-retriggerable mode, Q is

connected to -TR when leading edge triggering (+TR) is

used or Q is connected to +TR when trailing edge triggering

(-TR) is used.

The

time

period

(T)

for

this

multivibrator

can

be

periods as a function of RX for values of CX and VDD are

given in Figure 8. Values of T vary from unit to unit and as a

function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5k

Ω. The

maximum value of external capacitance, CX, is 100

µF.

Figure 9 shows time periods as a function of CX for values of

RX and VDD.

The output pulse width has variations of

±2.5% typically, over

and RX = 100k

Ω.

For power supply variations of

±5%, the output pulse width

has variations of

±0.5% typically, for VDD = 10V and 15V

and

±1% typically, for VDD = 5V at CX = 1000pF and

RX = 5k

Ω.

The CD4098BMS is supplied in these 16-lead outline packages:

Braze Seal DIP

H4T

Frit Seal DIP

H1F

Ceramic Flatpack

H6W

Features

• High Voltage Type (20V Rating)

• Retriggerable/Resettable Capability

• Trigger and Reset Propagation Delays Independent of

RX, CX

• Triggering from Leading or Trailing Edge

• Q and Q Buffered Outputs Available

• Separate Resets

• Wide Range of Output Pulse Widths

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

• Standardized Symmetrical Output Characteristics

• Maximum Input Current of 1

µA at 18V Over Full Pack-

• Noise Margin (Over Full Package/Temperature Range)

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Specifications for Description of

‘B’ Series CMOS Devices”

Applications

• Pulse Delay and Timing

• Pulse Shaping

Astable Multivibrator

Pinout

CD4098BMS

TOP VIEW

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

CX1

RXCX (1)

RESET (1)

+TR (1)

-TR (1)

Q1

VSS

Q1

VDD

RXCX (2)

RESET (2)

+TR (2)

-TR (2)

Q2

Q2

CX2

TERMINALS 1, 8, 15 ARE ELECTRICALLY

CONNECTED INTERNALLY

December 1992

File Number

3332