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CA3272A Datasheet(PDF) 6 Page - Intersil Corporation |
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CA3272A Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 10 page 6 The output will continue to turn on and off for as long as the shorted condition exists or until shutdown by the input logic. The resulting frequency and duty cycle of the output current flow is determined by the ambient temperature, the thermal resistance of the package in the application and the total power dissipation in the package. Since each output is inde- pendently protected, the frequency and duty cycle of the cur- rent flow into multiple shorted outputs will not be related in time. Long lead lengths in the load circuit may lead to oscilla- tory behavior if more than two output loads are shorted. Since a diagnostic flag indicates when an output is shorted, this information can be used as input to a microprocessor or dedicated logic circuit to provide a fast switch-off when a short occurs and, by sequence action, can be used to deter- mine which output is shorted. A fault condition in any output load will cause the FAULT output to switch to a logic “low”. Since a fault condition may be detected during switching, use of an appropriate size capacitor to filter the FAULT out- put is recommended. The recommended FAULT output cir- cuit is shown in Figure 2. This will prevent the FAULT output voltage from reaching a logic level “0” within the maximum switching time. The FAULT detection circuitry compares the state of the input and the state of the output for each A, B, C and D channel. The output is considered to be in a high state if the voltage exceeds the typical FAULT threshold reference volt- age, VTHD of 4V. If the output voltage is less than VTHD, the output is considered to be in a low state. For example, if the input is high and the output is less than VTHD, a normal “ON” condition exists and the FAULT output is high. If the input is high and the output is greater than VTHD, a shorted load condition is indicated and the FAULT output is low. When the input is low and the output is greater than VTHD, a normal “OFF” condition is indicated and the FAULT output is high. If the input is low and the output is less than VTHD, an open load condition exists and the FAULT output is low. The Output Driver Fault Sense state is determined by high and low comparator threshold limits which are defined in the Fault Parameters section of the Electrical Specifications. The FAULT output diagram of Figure 2 shows the circuit component interface for sensing a diagnostic fault condition. As noted, the time constant of TX = RXCX should be greater than the ON-OFF output switching times to avoid false fault readings during switching. For applications requiring fast period repetition rates, the maximum time constant should be significantly less than the period of switching. The short- est practical time constant is preferred to limit the duration of a fault condition. To match a standard CMOS or TTL interface, the switched current at the FAULT pin must be converted to VIH and VIL voltage levels using the RX external pullup resistor. The min- imum specified IOL limit at the FAULT output defines the Low (Fault) state which is used to test for a VOL maximum limit of 0.4V. This makes the calculation for the VIL input level rela- tively simple. Where VF is the FAULT output voltage, VCC is the power supply voltage, RX is the pullup resistor to VCC from the FAULT pin and IOL is the fault condition sink cur- rent, IO(SINK), the low state equation is: VF = VCC - RXIOL ≤ VIL (EQ. 1) As an example: Since TTL is the worst case for a low state, VIL = 0.8V. Using VCC = 5V, maximum VF = VOL = 0.4V and minimum IOL = 1mA for the CA3272A and CA3292A. At the worst case limit, the minimum value of RX is: RX = (VCC - VIL)/IOL = (5 - 0.4)V/0.001mA = 4.6kΩ The preferred value for RX would be greater than the values calculated. For the logic VIH High (normal state), VF = VCC - RXIOH ≥ VIH (EQ. 2) Where the IOH current is the specified leakage current, IF(LK) at the FAULT pin, it remains to check the calculated value for RX as a leakage current times the chosen pullup resistance. To determine that the minimum VOH from the FAULT pin is greater than VIH to an external logic match, VF is calculated using Equation 2. For example, using the mini- mum RX resistor value calculated for the CA3272A, VF = [5 - (4.6kΩ x 20µA)] = 4.9V which is more than suitable for CMOS or TTL Input switching levels; suggesting that a larger value of RX (such as 10kΩ) could be used for a better noise margin in the Low fault state. To detect an open load, each output has an internal low-level current sink, shown in Figure 3, which acts as a pull-down under open load fault conditions and is always active. The mag- nitude of this current plus any leakage associated with the out- put transistor will always be less than 100 µA. (The data sheet specification for ICEX includes this internal low-level sink cur- rent). The output load resistance must be chosen such that the voltage at the output will not be less than VTHD when the ICEX sink current flows through it under worse case conditions with minimum supply voltage. For example, assume a 6.5V mini- mum driver output supply voltage, a FAULT threshold reference voltage of VTHD = 5.5V and an output current sink of ICEX = 100µA. Calculate the maximum load resistance that will not result in a FAULT output low state when the output is OFF. ILIM TLIM ZENER CLAMP 4V ZA QA 0.02 Ω IO(SINK) 2 OUT A RLOAD VBATT FAULT SENSE THRESHOLD, VTHD FIGURE 3. OUTPUT OPEN LOAD DETECTION WHERE IO(SINK) IS AN ACTIVE CURRENT SINK PULLDOWN FOR OPEN-LOAD FAULT DETECTION. THE CURRENT ICEX IS IO(SINK) PLUS LEAKAGE CURRENTS OF THE OUTPUT DRIVER CA3272A, CA3292A |
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