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TOP271VG Datasheet(PDF) 7 Page - Power Integrations, Inc. |
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TOP271VG Datasheet(HTML) 7 Page - Power Integrations, Inc. |
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7 / 40 page  Rev. E 08/12 7 TOP264-271 www.powerint.com UV prevents auto-restart attempts after the output goes out of regulation. This eliminates power-down glitches caused by slow discharge of the large input storage capacitor present in applications such as standby supplies. A single resistor connected from the VOLTAGE-MONITOR pin to the rectified DC high-voltage bus sets UV threshold during power-up. Once the power supply is successfully turned on, the UV threshold is lowered to 44% of the initial UV threshold to allow extended input voltage operating range (UV low threshold). If the UV low threshold is reached during operation without the power supply losing regulation, the device will turn off and stay off until UV (high threshold) has been reached again. If the power supply loses regulation before reaching the UV low threshold, the device will enter auto-restart. At the end of each auto-restart cycle (S15), the UV comparator is enabled. If the UV high threshold is not exceeded, the MOSFET will be disabled during the next cycle (see Figure 8). The UV feature can be disabled independent of the OV feature. Line Overvoltage Shutdown (OV) The same resistor used for UV also sets an overvoltage threshold, which, once exceeded, will force TOP264-271 to stop switching instantaneously (after completion of the current switching cycle). If this condition lasts for at least 100 ms, the TOP264-271 output will be forced into off state. When the line voltage is back to normal with a small amount of hysteresis provided on the OV threshold to prevent noise triggering, the state machine sets to S13 and forces TOP264-271 to go through the entire auto-restart sequence before attempting to switch again. The ratio of OV and UV thresholds is preset at 4.5, as can be seen in Figure 9. When the MOSFET is off, the rectified DC high-voltage surge capability is increased to the voltage rating of the MOSFET (725 V), due to the absence of the reflected voltage and leakage spikes on the drain. The OV feature can be disabled independent of the UV feature. In order to reduce the no-load input power of TOP264-271 designs, the V pin operates at very low currents. This requires careful layout considerations when designing the PCB to avoid noise coupling. Traces and components connected to the V pin should not be adjacent to any traces carrying switching currents. These include the drain, clamp network, bias winding return or power traces from other converters. If the line sensing features are used, then the sense resistors must be placed within 10 mm of the V pin to minimize the V pin node area. The DC bus should then be routed to the line-sense resistors. Note that external capacitance must not be connected to the V pin as this may cause misoperation of the V pin related functions. Hysteretic or Latching Output Overvoltage Protection (OVP) The detection of the hysteretic or latching output overvoltage protection (OVP) is through the trigger of the line overvoltage threshold. The V pin voltage will drop by 0.5 V, and the controller measures the external attached impedance immediately after this voltage drops. If I V exceeds IOV(LS) (336 mA typical) longer than 100 ms, TOP264-271 will latch into a permanent off-state for the latching OVP. It only can be reset if I X exceeds I X(TH) = -27 mA (typ) or VC goes below the power-up reset threshold (V C(RESET)) and then back to normal. If IV does not exceed I OV(LS) or exceeds no longer than 100 ms, TOP264-271 will initiate the line overvoltage and the hysteretic OVP. Their behavior will be identical to the line overvoltage shutdown (OV) that has been described in detail in the previous section. During a fault condition resulting from loss of feedback, output voltage will rapidly rise above the nominal voltage. The increase in output voltage will also result in an increase in the voltage at the output of the bias winding. A voltage at the output of the bias winding that exceeds of the sum of the voltage rating of the Zener diode connected from the bias winding output to the V pin and V pin voltage, will cause a current in excess of I V to be injected into the V pin, which will trigger the OVP feature. PI-4531-121206 S13 S12 S0 S15 S13 S12 S0 S15 S14 S13 S15 S14 S14 5.8 V 4.8 V S15 0 V 0 V 0 V VLINE VC V DRAIN VOUT Note: S0 through S15 are the output states of the auto-restart counter 2 1 2 3 4 0 V S0 S15 VUV S12 Figure 8. Typical Waveforms for (1) Power-Up (2) Normal Operation (3) Auto-Restart (4) Power-Down. |
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