9

CA3059, CA3079

FIGURE 7A. GATE PULSE DURATION TEST CIRCUIT WITH

ASSOCIATED WAVEFORM FOR CA3059 AND

CA3079

FIGURE 7B. TOTAL GATE PULSE DURATION vs EXTERNAL

CAPACITANCE FOR CA3059 AND CA3079

FIGURE 7C. PULSE DURATION AFTER ZERO CROSSING vs

EXTERNAL CAPACITANCE FOR CA3059 & CA3079

FIGURE 7D. TOTAL GATE PULSE DURATION vs EXTERNAL

RESISTANCE FOR CA3059

FIGURE 8. OUTPUT LEAKAGE CURRENT (INHIBIT MODE) vs

AMBIENT TEMPERATURE FOR CA3059 AND CA3079

FIGURE 9. INPUT BIAS CURRENT TEST CIRCUIT FOR CA3059

AND CA3079

13

12

8

2

6K

5K

100

µF

4OSC.

WITH

HIGH

GAIN

INPUT

CA3059

CA3079

5

7

9

10

11

10K

120VRMS

60Hz

- dv/dt

AC LINE

+ dv/dt

GATE

PULSE

0V

NOTE: Circuitry within shaded area not included in CA3079.

All resistance values are in

Ω

1M

300

200

100

0

0

0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09

EXTERNAL CAPACITANCE (

µF)

120VRMS, 50/60Hz OPERATION

700

600

500

400

300

200

100

0

0

0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

EXTERNAL CAPACITANCE (

µF)

120VRMS, 50/60Hz OPERATION

EXTERNAL RESISTANCE (k

Ω)

40

30

20

10

0

10

100

120VRMS, 50/60Hz OPERATION

100

10

1

0.1

-80 -60 -40 -20 0

20

40 60 80 100 120 140

120VRMS, 50/60Hz OPERATION

NO EXTERNAL LOAD

CA3059

CA3079

2

7

9

+3V

13

8

V+ = 6V