AD6636_15 datasheet(6/80 Pages) AD

Part #	AD6636

Description	150 MSPS, Wideband, Digital Downconverter

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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AD6636

Rev. A | Page 6 of 80

SPECIFICATIONS

RECOMMENDED OPERATING CONDITIONS

Table 1.

Parameter

Temp

Test Level

Min

Typ

Max

Unit

VDDCORE

Full

IV

1.7

1.8

1.9

V

VDDIO

Full

IV

3.0

3.3

3.6

V

TAMBIENT

Full

IV

−40

+25

+85

°C

ELECTRICAL CHARACTERISTICS1

Table 2.

Parameter

Temp

Test Level

Min

Typ

Max

Unit

LOGIC INPUTS (NOT 5 V TOLERANT)

Logic Compatibility

Full

IV

3.3

V CMOS

Logic 1 Voltage

Full

IV

2.0

3.6

V

Logic 0 Voltage

Full

IV

−0.3

+0.8

V

Logic 1 Current

Full

IV

1

10

μA

Logic 0 Current

Full

IV

1

10

μA

Input Capacitance

25°C

V

4

pF

LOGIC OUTPUTS

Logic Compatibility

Full

IV

3.3

V CMOS

Logic 1 Voltage (IOH = 0.25 mA)

Full

IV

2.0

VDDIO − 0.2

V

Logic 0 Voltage (IOL = 0.25 mA)

Full

IV

0.2

0.4

V

SUPPLY CURRENTS

WCDMA (61.44 MHz) Example1

IVDDCORE

25°C

V

450

mA

IVDDIO

25°C

V

50

mA

CDMA 2000 (61.44 MHz) Example1

IVDDCORE

25°C

V

400

mA

IVDDIO

25°C

V

25

mA

TDS-CDMA (76.8 MHz) Example1, 2

IVDDCORE

25°C

V

250

mA

IVDDIO

25°C

V

15

mA

GSM (65 MHz) Example1, 2

IVDDCORE

25°C

V

175

mA

IVDDIO

25°C

V

10

mA

TOTAL POWER DISSIPATION

WCDMA (61.44 MHz)1

25°C

V

975

mW

CDMA2000 (61.44 MHz)1

25°C

V

800

mW

TD-SCDMA (76.8 MHz)1, 2

25°C

V

500

mW

GSM (65 MHz)1, 2

25°C

V

350

mW

1 One input port, all six channels, and the relevant signal processing blocks are active.

2 PLL is turned off for power savings.

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