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87C196CB Datasheet(PDF) 7 Page - Intel Corporation

Part # 87C196CB
Description  ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2.0
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

87C196CB Datasheet(HTML) 7 Page - Intel Corporation

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87C196CA87C196CB
Symbol
Name and Function
VCC
Main Supply Voltage (a5V)
VSS VSS1
Digital circuit ground (0V) There are 7 VSS pins CB (4 on CA) all of which MUST be
connected to a single ground plane
VREF
Reference for the AD converter (a5V) VREF is also the supply voltage to the analog
portion of the AD converter and the logic used to read Port 0 Must be connected for
AD and Port 0 to function
ANGND
Reference ground for the AD converter Must be held at nominally the same potential
as VSS
VPP
Programming voltage for EPROM parts It should be a125V for programming It is
also the timing pin for the return from powerdown circuit Connect this pin with a 1 mF
capacitor to VSS and a 1Mohm resistor to VCC If this function is not used VPP may be
tied to VCC
XTAL1
Input of the oscillator inverter and the internal clock generator
XTAL2
Output of the Oscillator Inverter
RESET
Reset input to the chip Input low for at least 16 state times will reset the chip The
subsequent low to high transition resynchronizes CLKOUT and commences a
10-state time sequence in which the PSW is cleared bytes are read from 2018H
201Ah and 201CH (if enabled) loading the CCB’s and a jump to location 2080H is
executed Input high for normal operation RESET
has an internal pullup
NMI
A positive transition causes a non-maskable interrupt vector through memory location
203EH If not used this pin should be tied to VSS May be used by Intel Evaluation
boards
EA
Input for memory select (External Access) EA
equal to a high causes memory
accesses to locations 0FF2000H through 0FFFFFFH to be directed to on-chip
EPROMROM EA
equal to a low causes accesses to these locations to be directed
to off-chip memory EA
ea
125V causes execution to begin in the Programming
Mode EA
is latched at reset
PLLEN
Selects between PLL mode or PLL bypass mode This pin must be either tied high or
low PLLEN pin e 0 bypass PLL mode PLLEN pin e 1 places a 4x PLL at the input
(196CB only)
of the crystal oscillator Allows for a low frequency crystal to drive the device (ie
5 MHz e 20 MHz operation)
P64 – 67SSIO
Dual function IO ports have a system function as Synchronous Serial IO Two pins
are clocks and two pins are data providing for full duplex capability Also LSIO when
not used as SSIO
P63T1DIR
Dual function IO pin Primary function is that of a bidirectional IO pin however it
may also be used as a TIMER1 Direction input The TIMER1 will increment when this
(CB only)
pin is high and decrements when this pin is low
P62T1CLK
Dual function IO pin Primary function is that of a bidirectional IO pin however may
also be used as a TIMER1 Clock input The TIMER1 will increment or decrement on
(CB only)
both positive and negative edges of this pin
P60 – 61EPA8 – 9
Dual function IO port pins Primary function is that of bidirectional IO System
function is that of High Speed capture and compare
7


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