82379AB datasheet(11/137 Pages) INTEL

11 / 137 page

82378ZB (SIO) AND 82379 (SIO.A)

11

Advanced Programmable Interrupt Controller (APIC) (SIO.A Only)

In addition to the standard ISA-compatible interrupt controller described above, the SIO.A incorporates the

Advanced Programmable Interrupt Controller (APIC). While the standard interrupt controller is intended for use in

a uni-processor system, APIC can be used in either a uni-processor or multi-processor system. APIC provides

multi-processor interrupt management and incorporates both static and dynamic symmetric interrupt distribution

across all processors. In systems with multiple I/O subsystems, each subsystem can have its own set of

interrupts.

Power Management

Extensive power management capability permits a system to operate in a low power state without being

powered down. Once in the low power state (called 'Fast-Off' state), the computer appears to be off. For

example, the System Memory Management (SMM) code could turn off the CRT, line printer, hard disk drive's

spindle motor, and fans. In addition, the CPU's clock can be governed. To the user, the machine appears to be

in the off state. However, the system is actually in an extremely low power state that still permits the CPU to

function and maintain communication connections normally associated with today's desktops (e.g., LAN,

Modem, or FAX). Programmable options provide power management flexibility. For example, various system

events can be programmed to place the system in the low power state or break events can be programmed to

wake the system up.

Test

The test block provides the interface to the test circuitry within the SIO/SIO.A. The test input can be used to tri-

state all of the SIO/SIO.A outputs.

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