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E28F400CVT60 Datasheet(PDF) 6 Page - Intel Corporation |
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E28F400CVT60 Datasheet(HTML) 6 Page - Intel Corporation |
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6 / 57 page  4-MBIT SmartVoltage BOOT BLOCK FAMILY E 6 PRELIMINARY For program and erase operations, 5V VPP operation eliminates the need for in system voltage converters, while 12V VPP operation provides faster program and erase for situations where 12V is available, such as manufacturing or designs where 12V is in-system. For design simplicity, however, just hook up VCC and VPP to the same 5V ± 10% source. The 28F400/28F004B boot block flash memory family is a high-performance, 4-Mbit (4,194,304 bit) flash memory family organized as either 256 Kwords of 16 bits each (28F400 only) or 512 Kbytes of 8 bits each (28F400 and 28F004B). Separately erasable blocks, including a hardware- lockable boot block (16,384 bytes), two parameter blocks (8,192 bytes each) and main blocks (one block of 98,304 bytes and three blocks of 131,072 bytes), define the boot block flash family architecture. See Figures 7 and 8 for memory maps. Each block can be independently erased and programmed 100,000 times at commercial temperature or 10,000 times at extended temperature. The boot block is located at either the top (denoted by -T suffix) or the bottom (-B suffix) of the address map in order to accommodate different microprocessor protocols for boot code location. The hardware-lockable boot block provides complete code security for the kernel code required for system initialization. Locking and unlocking of the boot block is controlled by WP# and/or RP# (see Section 3.4 for details). The Command User Interface (CUI) serves as the interface between the microprocessor or microcontroller and the internal operation of the boot block flash memory products. The internal Write State Machine (WSM) automatically executes the algorithms and timings necessary for program and erase operations, including verifications, thereby unburdening the microprocessor or microcontroller of these tasks. The Status Register (SR) indicates the status of the WSM and whether it successfully completed the desired program or erase operation. Program and Erase Automation allows program and erase operations to be executed using an industry- standard two-write command sequence to the CUI. Data writes are performed in word (28F400 family) or byte (28F400 or 28F004B families) increments. Each byte or word in the flash memory can be programmed independently of other memory locations, unlike erases, which erase all locations within a block simultaneously. The 4-Mbit SmartVoltage boot block flash memory family is also designed with an Automatic Power Savings (APS) feature which minimizes system battery current drain, allowing for very low power designs. To provide even greater power savings, the boot block family includes a deep power-down mode which minimizes power consumption by turning most of the flash memory’s circuitry off. This mode is controlled by the RP# pin and its usage is discussed in Section 3.5, along with other power consumption issues. Additionally, the RP# pin provides protection against unwanted command writes due to invalid system bus conditions that may occur during system reset and power-up/down sequences. For example, when the flash memory powers-up, it automatically defaults to the read array mode, but during a warm system reset, where power continues uninterrupted to the system components, the flash memory could remain in a non-read mode, such as erase. Consequently, the system Reset signal should be tied to RP# to reset the memory to normal read mode upon activation of the Reset signal. See Section 3.6. The 28F400 provides both byte-wide or word-wide input/output, which is controlled by the BYTE# pin. Please see Table 2 and Figure 16 for a detailed description of BYTE# operations, especially the usage of the DQ15/A–1 pin. The 28F400 products are available in a ROM/EPROM-compatible pinout and housed in the 44-lead PSOP (Plastic Small Outline) package, the 48-lead TSOP (Thin Small Outline, 1.2 mm thick) package and the 56-lead TSOP as shown in Figures 4, 5 and 6, respectively. The 28F004 products are available in the 40-lead TSOP package as shown in Figure 3. Refer to the DC Characteristics Table, Section 5.2 (commercial temperature) and Section 6.2 (extended temperature), for complete current and voltage specifications. Refer to the AC Characteristics Table, Section 5.3 (commercial temperature) and Section 6.3 (extended temperature), for read, write and erase performance specifications. |
Similar Part No. - E28F400CVT60 |
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Similar Description - E28F400CVT60 |
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