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L64250JC15 Datasheet(PDF) 8 Page - InnovASIC, Inc |
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L64250JC15 Datasheet(HTML) 8 Page - InnovASIC, Inc |
8 / 21 page IA64250 Data Sheet Histogram/Hough Transform Processor As of Production Ver. 01 Copyright © 2000 ENG211001219-01 www.innovasic.com innovASIC Customer Support: The End of Obsolescence ™ Page 8 of 21 1-888-824-4184 io(1:0) Control the operations of the ACC and LUT RAMs during I/O mode (when the STARTIOn signal has been asserted). io0 io1 FUNCTION 0 0 1 1 0 1 0 1 transfer data from the ACC RAM to the LUT RAM read the ACC RAM read the LUT RAM write the LUT RAM hclr(1:0) Control the clearing of the ACC RAM during I/O mode hclr0 hclr1 FUNCTION 0 0 1 1 0 1 0 1 ACC RAM cleared when either the ACC RAM or LUT RAM is accessed Undefined ACC RAM cleared only when the ACC RAM is accessed ACC RAM not cleared during an i/o operation func Determines the function performed by the marker processor. When high, each marker circuit within the processor will locate an accumulated count from the ACC RAM corresponding to the previously given grey value. When low, each marker will locate the grey value corresponding to a previously given accumulation count from the ACC RAM. pdwn When high, the ACC and LUT RAMs are placed in an inactive mode. Should be low for normal operation. MEMORY CONFIGURATIONS: The following memory maps specify the configuration of the ACC RAM and the LUT RAM in the various computational modes. ACC RAM Histogram Mode: Grey Level Memory Contents 0 Count for Grey Value 0 1 Count for Grey Value 1 . . . . . . . . 511 Count for Grey Value 511 |
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