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IDT74FCT543CTQ Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT74FCT543CTQ Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 7 page IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 6.17 2 PIN CONFIGURATIONS DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW 5 6 7 8 9 10 11 12 GND A0 A1 A2 1 2 3 4 24 23 22 21 20 19 18 17 Vcc 16 15 14 13 P24-1 D24-1 SO24-2 SO24-7 SO24-8 & E24-1 B0 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB LEBA OEBA CEAB CEBA LCC TOP VIEW 5 6 7 8 9 10 11 L28-1 25 24 23 22 21 20 19 INDEX A1 A2 A3 A4 A5 A6 NC NC B1 B2 B3 B4 B5 B6 12 13 14 15 16 17 18 43 2 1 28 27 26 2613 drw 02 2613 drw 03 FUNCTION TABLE (1, 2) For A-to-B (Symmetric with B-to-A) Latch Output Inputs Status Buffers CEAB CEAB LEAB LEAB OEAB OEAB A-to-B B0–B7 H — — Storing High Z — H — Storing — — — H — High Z L L L Transparent Current A Inputs L H L Storing Previous* A Inputs NOTES: 2613 tbl 02 1. * Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level — = Don’t Care or Irrelevant 2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA. ABSOLUTE MAXIMUM RATINGS (1) Symbol Rating Commercial Military Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7.0 –0.5 to +7.0 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC +0.5 –0.5 to VCC +0.5 V TA Operating Temperature 0 to +70 –55 to +125 °C TBIAS Temperature Under Bias –55 to +125 –65 to +135 °C TSTG Storage Temperature –55 to +125 –65 to +150 °C PT Power Dissipation 0.5 0.5 W IOUT DC Output Current –60 to +120 –60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. 2613 lnk 03 PIN DESCRIPTION Pin Names Description OEAB A-to-B Output Enable Input (Active LOW) OEBA B-to-A Output Enable Input (Active LOW) CEAB A-to-B Enable Input (Active LOW) CEBA B-to-A Enable Input (Active LOW) LEAB A-to-B Latch Enable Input (Active LOW) LEBA B-to-A Latch Enable Input (Active LOW) A0–A7 A-to-B Data Inputs or B-to-A 3-State Outputs B0–B7 B-to-A Data Inputs or A-to-B 3-State Outputs 2613 tbl 01 CAPACITANCE (TA = +25 °C, f = 1.0MHz) Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF NOTE: 1. This parameter is measured at characterization but not tested. 2613 lnk 04 |
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