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IDT7M1002S35GB Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT7M1002S35GB Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 12 page  7.02 4 IDT7M1002 16K x 32 CMOS DUAL-PORT STATIC RAM MODULE MILITARY AND COMMERCIAL TEMPERATURE RANGES 2795 tbl 08 Figure 1. Output Load AC TEST CONDITIONS Input Pulse Levels GND to 3.0V Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V Output Load See Figures 1 and 2 CAPACITANCE(1) (TA = +25 °C, f = 1.0MHz) Symbol Parameter Condition Max. Unit CIN (1) Input Capacitance VIN = 0V 40 pF ( CS, OE, SEM, Address) CIN(2) Input Capacitance VIN = 0V 12 pF (R/ W, I/O, INT) CIN(3) Input Capacitance VIN = 0V 45 pF ( BUSY, M/S) COUT Output Capacitance VOUT = 0V 12 pF (I/O) NOTE: 1. This parameter is guaranteed by design but not tested. (Continued on next page) *Including scope and jig capacitances. 2795 drw 04 +5V 480 Ω 255 Ω 5pF* DATAOUT *Including scope and jig capacitances. 2795 drw 03 +5V 480 Ω 255 Ω 30pF* BUSY, INT Figure 2. Output Load (For tCHZ, tCLZ, tOHZ, tOLZ, tWHZ, tOW) 2795 tbl 07 2795 tbl 09 AC ELECTRICAL CHARACTERISTICS (VCC = 5V ± 10%, TA = –55°C to +125°C or 0°C to +70°C) 7M1002SxxG 7M1002SxxGB 30 –35 –40 –45 Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit Read Cycle tRC Read Cycle Time 30 — 35 — 40 — 45 — ns tAA Address Access Time — 30 — 35 — 40 — 45 ns tACS (2) Chip Select Access Time — 30 — 35 — 40 — 45 ns tOE Output Enable Access Time — 17 — 20 — 22 — 25 ns tOH Output Hold from Address Change 3 — 3 — 3 — 3 — ns tLZ (1) Output to Low-Z 3 — 3 — 3 — 5 — ns tHZ (1) Output to High-Z — 15 — 15 — 17 — 20 ns tPU (1) Chip Select to Power Up Time 0 — 0 — 0 — 0 — ns tPD (1) Chip Deselect to Power Up Time — 50 — 50 — 50 — 50 ns tSOP Sem. Flag Update Pulse ( OE or SEM) 15 — 15 — 15 — 15 — ns Write Cycle tWC Write Cycle Time 30 — 35 — 40 — 45 — ns tCW (2) Chip Select to End-of-Write 25 — 30 — 35 — 40 — ns tAW Address Valid to End-of-Write 25 — 30 — 35 — 40 — ns tAS Address Set-Up Time 0 — 0 — 0 — 0 — ns tWP Write Pulse Width 25 — 30 — 35 — 35 — ns tWR Write Recovery Time 0 — 0 — 0 — 0 — ns |
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