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IDT54FCT388915T70PYB Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT54FCT388915T70PYB Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 11 page IDT54/74FCT388915T 70/100/133/150 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.8 4 POWER SUPPLY CHARACTERISTICS OUTPUT FREQUENCY SPECIFICATIONS NOTES: 1. Note 7 in "General AC Specification Notes" and Figure 3 describes this specification and its actual limits depending on the feedback connection. 2. Maximum operating frequency is guaranteed with the part in a phase locked condition and all outputs loaded. SYNC INPUT TIMING REQUIREMENTS 3052 tbl 06 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25 °C ambient. 3. Per TTL driven input. All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. It is derived with Q frequency as the reference. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (f) + ILOAD ICC = Quiescent Current (ICCL , ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) f =2Q Frequency ILOAD = Dynamic Current due to load. 3052 tbl 05 Symbol Parameter Min. Max. Unit TRISE/FALL Rise/Fall Times, SYNC inputs (0.8V to 2.0V) — 3.0 ns Frequency Input Frequency, SYNC Inputs 10.0(1) 2Q fmax MHz Duty Cycle Input Duty Cycle, SYNC Inputs 25% 75% — Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ∆ICC Quiescent Power Supply Current VCC = Max. VIN = VCC –0.6V(3) — 2.0 30 µA TTL Inputs HIGH VIN = VCC –2.1V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. All Outputs Open VIN = VCC VIN = GND — 0.2 0.3 mA/ MHz CPD Power Dissipation Capacitance 50% Duty Cycle — 15 25 pF IC Total Power Supply Current(6) VCC = Max. PLL_EN = 1, LOCK = 1, FEEDBACK = Q4 SYNC frequency = 50MHz. All bits loaded with 15pF —30 60 mA VCC = Max. PLL_EN = 1, LOCK = 1, FEEDBACK = Q4 SYNC frequency = 50MHz. All bits loaded with 50 Ω Thevenin termination and 20pF — 90 120 mA 3052 tbl 07 Max. (2) Symbol Parameter Min. 70 100 133 150 Unit f2Q Operating frequency 2Q Output 40 70 100 133 150 MHz fQ Operating frequency Q0-Q4, Q5 Outputs 20 35 50 66.7 75 MHz fQ/2 Operating frequency Q/2 Output 10 17.5 25 33.3 37.5 MHz |
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