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IDT74FCT163601APF Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT74FCT163601APF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 7 page 5.9 2 IDT74FCT163601/A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVERS COMMERCIAL TEMPERATURE RANGE CAPACITANCE (TA = +25 °C, f = 1.0MHz) Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6.0 pF CI/O I/O Capacitance VOUT = 0V 3.5 8.0 pF NOTE: 1. This parameter is measured at characterization but not tested. 3251 lnk 04 PIN CONFIGURATIONS 3251 drw 02 CLKENAB B2 B3 GND B4 B5 VCC B6 B7 B1 B8 B9 B10 B11 GND B12 B13 VCC B14 GND CLKAB B16 B15 B17 GND B18 CLKBA CLKENBA OEAB LEAB A1 GND A2 A3 VCC A4 A5 GND A6 A7 A8 A9 GND A10 A11 VCC A12 A18 A14 A13 A16 GND A17 LEBA A15 OEBA 47 37 38 39 40 41 42 43 44 45 46 33 34 35 36 56 55 49 50 51 52 53 54 48 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 SSOP TSSOP/TVSOP TOP VIEW SO56-1 SO56-2 SO56-3 29 30 31 32 25 26 27 28 PIN DESCRIPTION Pin Names Description OEAB A-to-B Output Enable Input (Active LOW) OEBA B-to-A Output Enable Input (Active LOW) LEAB A-to-B Latch Enable Input LEBA B-to-A Latch Enable Input CLKAB A-to-B Clock Input CLKBA B-to-A Clock Input Ax A-to-B Data Inputs or B-to-A 3-State Outputs Bx B-to-A Data Inputs or A-to-B 3-State Outputs CLKENAB A to B Clock Enable Input (Active LOW) CLKENBA B to A Clock Enable Input (Active LOW) 3251 tbl 01 FUNCTION TABLE (1,4) Inputs Outputs CLKENAB CLKENAB OEAB OEAB LEAB CLKAB A B XH X X X Z XL H X L L XL H X H H HL L X X B0(2) LL L ↑ LL LL L ↑ HH L LLL X B0(2) LL L H X B0(3) NOTES: 3251 tbl 02 1. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, CLKBA and CLKENBA. 2. Output level before the indicated steady-state input conditions were established. 3. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW. 4. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-impedance ↑ = LOW-to-HIGH Transition ABSOLUTE MAXIMUM RATINGS (1) NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Output and I/O terminals. 3251 lnk 03 Symbol Description Max. Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to +7.0 V VTERM(4) Terminal Voltage with Respect to GND –0.5 to VCC + 0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +60 mA |
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