IDT54FCT163652C datasheet(7/9 Pages) IDT

Part #	IDT54FCT163652C

Description	3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER

MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.7

7

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs of the same package, switching in the same direction. This parameter is guaranteed by design.

4. Propagation Delays and Enable/Disable times are with VCC = 3.3V

±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays

and Enable/Disable times should be degraded by 20%.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

(4)

3084 tbl 09

FCT163652

FCT163652A

FCT163652C

Com'l.

Mil.

Com'l.

Mil.

Com'l.

Mil.

Symbol

Parameter

Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit

tPLH

tPHL

Propagation Delay

Bus to Bus

CL = 50pF

RL = 500

Ω

2.0

9.0

2.0

11.0

2.0

6.3

2.0

7.7

1.5

5.4

—

ns

tPZH

tPZL

Output Enable Time

xOEAB or x

OEBA to Bus

2.0

14.0

2.0

15.0

2.0

9.8

2.0

10.5

1.5

7.8

—

ns

tPHZ

tPLZ

Output Disable Time

xOEAB or x

OEBA to Bus

2.0

9.0

2.0

11.0

2.0

6.3

2.0

7.7

1.5

6.3

—

ns

tPLH

tPHL

Propagation Delay

Clock to Bus

2.0

9.0

2.0

10.0

2.0

6.3

2.0

7.0

1.5

5.7

—

ns

tPLH

tPHL

Propagation Delay xSBA or

xSAB to Bus

2.0

11.0

2.0

12.0

2.0

7.7

2.0

8.4

1.5

6.2

—

ns

tSU

Set-up Time HIGH or LOW

Bus to Clock

4.0

—

4.5

—

2.0

—

2.0

—

2.0

—

ns

tH

Hold Time HIGH or LOW

Bus to Clock

2.0

—

2.0

—

1.5

—

1.5

—

1.5

—

ns

tW

Clock Pulse Width

HIGH or LOW

6.0

—

6.0

—

5.0

—

5.0

—

5.0

—

ns

tSK(o) Output Skew(3)

—

0.5

—

0.5

—

0.5

—

0.5

—

0.5

—

ns

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