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UPA1763G Datasheet(PDF) 2 Page - NEC |
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UPA1763G Datasheet(HTML) 2 Page - NEC |
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2 / 8 page  Data Sheet G14056EJ1V0DS00 2 µµµµPA1763 ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 2.3 A 37.0 47.0 m Ω RDS(on)2 VGS = 4.5 V, ID = 2.3 A 45.0 57.0 m Ω RDS(on)3 VGS = 4.0 V, ID = 2.3 A 49.0 66.0 m Ω Gate to Source Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V Forward Transfer Admittance | yfs |VDS = 10 V, ID = 2.3 A 3.0 6.0 S Drain Leakage Current IDSS VDS = 60 V, VGS = 0 V 10 µA Gate to Source Leakage Current IGSS VGS = ±16 V, VDS = 0 V ±10 µA Input Capacitance Ciss VDS = 10 V 870 pF Output Capacitance Coss VGS = 0 V 150 pF Reverse Transfer Capacitance Crss f = 1 MHz 80 pF Turn-on Delay Time td(on) ID = 2.3 A 11 ns Rise Time tr VGS(on) = 10 V 40 ns Turn-off Delay Time td(off) VDD = 30 V 50 ns Fall Time tf RG = 10 Ω 12 ns Total Gate Charge QG ID = 4.5 A 20 nC Gate to Source Charge QGS VDD = 48 V 3 nC Gate to Drain Charge QGD VGS = 10 V 5 nC Body Diode Forward Voltage VF(S-D) IF = 4.5 A, VGS = 0 V 0.80 V Reverse Recovery Time trr IF = 4.5 A, VGS = 0 V 30 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs40 nC 5 TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V PG. RG = 25 Ω 50 Ω D.U.T. L VDD TEST CIRCUIT 1 AVALANCHE CAPABILITY PG. RG = 10 Ω D.U.T. RL VDD TEST CIRCUIT 2 SWITCHING TIME RG PG. IG = 2 mA 50 Ω D.U.T. RL VDD ID VDD IAS VDS BVDSS Starting Tch VGS 0 τ = 1 µs Duty Cycle ≤ 1 % τ VGS Wave Form ID Wave Form VGS ID 10 % 0 0 90 % 90 % 90 % VGS(on) ID ton toff td(on) tr td(off) tf 10 %10 % 5 |
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