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IDT7200LA25TP Datasheet(PDF) 7 Page - Integrated Device Technology

Part # IDT7200LA25TP
Description  CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7200LA25TP Datasheet(HTML) 7 Page - Integrated Device Technology

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IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (
HF) is then
reset by using rising edge of the read operation.
In the Depth Expansion Mode, Expansion In (
XI) is con-
nected to Expansion Out (
XO) of the previous device. This
output acts as a signal to the next device in the Daisy Chain
by providing a pulse to the next device when the previous
device reaches the last location of memory.
DATA OUTPUTS (Q0 – Q8)
Data outputs for 9-bit wide data. This data is in a high
impedance condition whenever Read (
R) is in a high state.
W
RS
R
EF
HF, FF
tRSC
t RS
t RSS
t RSS
tRSR
t EFL
t HFH, t FFH
2679 drw 04
NOTES:
1.
EF, FF, HF may change status during Reset, but flags will be valid at tRSC.
2.
W and R = VIH around the rising edge of RS.
Figure 2. Reset
LAST WRITE
R
IGNORED
WRITE
FIRST READ
ADDITIONAL
READS
FIRST
WRITE
W
FF
t WFF
tRFF
2679 drw 06
Figure 4. Full Flag From Last Write to First Read
t A
R
t RC
DATA OUT VALID
DATA OUT VALID
t RPW
t RLZ
t DV
t A
t RHZ
t RR
t WC
t WR
t WPW
DATA IN VALID
DATA IN VALID
tDS
tDH
Q0 – Q8
2679 drw 05
W
D0 – D8
Figure 3. Asynchronous Write and Read Operation


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