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IDT6116LA20SO Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT6116LA20SO Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 11 page ©2000 Integrated Device Technology, Inc. FEBRUARY 2001 DSC-3089/03 1 Features x x x x x High-speed access and chip select times – Military: 20/25/35/45/55/70/90/120/150ns (max.) – Industrial: 20/25/35/45ns (max.) – Commercial: 15/20/25/35/45ns (max.) x x x x x Low-power consumption x x x x x Battery backup operation – 2V data retention voltage (LA version only) x x x x x Produced with advanced CMOS high-performance technology x x x x x CMOS process virtually eliminates alpha particle soft-error rates x x x x x Input and output directly TTL-compatible x x x x x Static operation: no clocks or refresh required x x x x x Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip, 24-pin SOIC and 24-pin SOJ x x x x x Military product compliant to MIL-STD-833, Class B Description The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using IDT's high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. AllinputsandoutputsoftheIDT6116SA/LAareTTL-compatible.Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil plastic or ceramic DIP, 24-lead gull-wing SOIC, and 24-lead J-bend SOJ providing high board-level packing densities. Military grade product is manufactured in compliance to the latest version of MIL-STD-883, Class B, making it ideally suited to military temperatureapplicationsdemandingthehighestlevelofperformanceand reliability. Functional Block Diagram CS A 0 A 10 I/O 0 I/O 7 OE WE 128 X 128 MEMORY ARRAY I/O CONTROL ADDRESS DECODER INPUT DATA CIRCUIT CONTROL CIRCUIT GND 3089 drw 01 VCC , CMOS Static RAM 16K (2K x 8-Bit) IDT6116SA IDT6116LA |
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