ADT14

–3–

REV. 0

WAFER TEST LIMITS

Parameter

Symbol

Conditions

Min

Typ

Max

Units

INPUTS SET HIGH, SET LOW

Input Bias Current

70

nA

OUTPUT VPTAT

Temperature Accuracy

°C, No Load

1.5

°C

Nominal Value

2.490

2.510

V

Line Regulation

4.5 V

≤ V ≤ 13.2 V

±0.08

%/V

Load Regulation

10

µA ≤ IV

REF

≤ 500 µA

±0.25

%/mA

OPEN-COLLECTOR OUTPUTS OVER, UNDER

Output Low Voltage

0.4

V

Output Leakage Current

100

µA

POWER SUPPLY

Supply Range

V+

4.5

5.5

V

Supply Current

Unloaded

600

µA

NOTE

Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly and nominal yield loss, yield after packaging is not guaranteed for

standard product dice. Consult factory to negotiate specifications based on lot qualification through sample lot assembly and testing.

DICE CHARACTERISTICS

Die Size 0.069

× 0.080 inch, 5520 sq. mils

(1.75

× 2.03 mm, 3.55 sq. mm)

Transistor Count: 130

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the ADT14 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

OBSOLETE