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IDT49FCT805LB Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT49FCT805LB Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 7 page IDT49FCT805/806/A FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 2 PIN CONFIGURATIONS PIN DESCRIPTION IDT49FCT805 IDT49FCT806 2574 tbl 01 OB1 OA1 OA3 GNDA OA4 OA5 OA2 OEA INA OB2 OB3 GNDB OB4 MON INB OB5 OEB VCCB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW P20-1 D20-1 SO20-2 SO20-7 SO20-8 & E20-1 VCCA 2574 drw 03 NC (1) OB1 OA1 OA3 GNDA OA4 OA5 NC OA2 OEA INA OB2 OB3 GNDB OB4 MON INB OB5 OEB VCCB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DIP/SOIC/CERPACK TOP VIEW P20-1 D20-1 SO20-2 & E20-1 VCCA 2574 drw 05 (1) OB2 OB3 GNDB OB4 OB5 INDEX LCC TOP VIEW 3 2 20 19 1 4 5 6 7 8 18 17 16 15 14 910 11 12 13 L20-2 OA3 GNDA OA4 OA5 NC 2574 drw 06 (1) Pin Names Description OEA, OEB 3-State Output Enable Inputs (Active LOW) INA, INB Clock Inputs OAn, OBn Clock Outputs (FCT805) OAn, OBn Clock Outputs (FCT806) MON Monitor Output (FCT805) MON Monitor Output (FCT806 INDEX LCC TOP VIEW 3 2 20 19 1 4 5 6 7 8 18 17 16 15 14 910 11 12 13 L20-2 OA3 GNDA OA4 OA5 NC OB2 OB3 GNDB OB4 OB5 2574 drw 04 (1) NOTE: 1. Pin 8 is not internally connected on devices with a "K" prefix in the date code. On older devices, pin 8 is internally connected to GND. To insure compatibility with all products, pin 8 should be connected to GND at the board level. |
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