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IDT71256SA70 Datasheet(PDF) 4 Page - Integrated Device Technology

Part No. IDT71256SA70
Description  CMOS STATIC RAM 256K (32K x 8-BIT)
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT71256SA70
CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
4
TIMING WAVEFORM OF READ CYCLE NO. 1
(1)
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V
± 10%, CommercialTemperature Range Only)
71256SA70
Symbol
Parameter
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
70
ns
tAA
Address Access Time
—70
ns
tACS
Chip Select Access Time
—70
ns
tCLZ
(2)
Chip Select to Output in Low-Z
4
ns
tCHZ
(2)
Chip Deselect to Output in High-Z
0
11
ns
tOE
Output Enable to Output Valid
11
ns
tOLZ
(2)
Output Enable to Output in Low-Z
0
ns
tOHZ
(2)
Output Disable to Output in High-Z
0
10
ns
tOH
Output Hold from Address Change
3
ns
tPU
(2)
Chip Select to Power Up Time
0
ns
tPD
(2)
Chip Deselect to Power Down Time
25
ns
Write Cycle
tWC
Write Cycle Time
70
ns
tAW
Address Valid to End of Write
20
ns
tCW
Chip Select to End of Write
20
ns
tAS
Address Set-up Time
0—
ns
tWP
Write Pulse Width
20
ns
tWR
Write Recovery Time
0—
ns
tDW
Data Valid to End of Write
13
ns
tDH
Data Hold Time
0—
ns
tOW
(2)
Output Active from End of Write
4
ns
tWHZ
(2)
Write Enable to Output in High-Z
0
11
ns
NOTES:
3567 tbl 08
1. 0
° to +70°C temperature range only.
2. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
ADDRESS
OE
CS
DATAOUT
VCC SUPPLY
CURRENT
3567 drw 06
(5)
(5)
(5)
(5)
DATA
VALID
HIGH IMPEDANCE
tAA
tRC
tOE
tACS
tOLZ
tCHZ
tCLZ
(3)
tOHZ
OUT
tPU
tPD
ICC
ISB




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