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IDT7025L35J Datasheet(PDF) 9 Page - Integrated Device Technology |
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IDT7025L35J Datasheet(HTML) 9 Page - Integrated Device Technology |
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9 / 20 page  IDT7025S/L HIGH-SPEED 8K x 16 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES 6.16 9 AC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE(5) IDT7025X15 IDT7025X17 IDT7025X20 IDT7025X25 Com'l. Only Com'l. Only Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit WRITE CYCLE tWC Write Cycle Time 15 — 17 — 20 — 25 — ns tEW Chip Enable to End-of-Write (3) 12 — 12 — 15 — 20 — ns tAW Address Valid to End-of-Write 12 — 12 — 15 — 20 — ns tAS Address Set-up Time (3) 0 — 0— 0— 0— ns tWP Write Pulse Width 12 — 12 — 15 — 20 — ns tWR Write Recovery Time 0 — 0 — 0 — 0 — ns tDW Data Valid to End-of-Write 10 — 10 — 15 — 15 — ns tHZ Output High-Z Time (1, 2) — 10 — 10 — 12 — 15 ns tDH Data Hold Time (4) 0 — 0— 0— 0— ns tWZ Write Enable to Output in High-Z (1, 2) — 10 — 10 — 12 — 15 ns tOW Output Active from End-of-Write (1, 2, 4) 0 — 0— 0— 0— ns tSWRD SEM Flag Write to Read Time 5 — 5 — 5 — 5 — ns tSPS SEM Flag Contention Window 5 — 5 — 5 — 5 — ns IDT7025X35 IDT7025X55 IDT7025X70 Mil. Only Symbol Parameter Min. Max. Min. Max. Min. Max. Unit WRITE CYCLE tWC Write Cycle Time 35 — 55 — 70 — ns tEW Chip Enable to End-of-Write (3) 30 — 45 — 50 — ns tAW Address Valid to End-of-Write 30 — 45 — 50 — ns tAS Address Set-up Time (3) 0— 0— 0— ns tWP Write Pulse Width 25 — 40 — 50 — ns tWR Write Recovery Time 0 — 0 — 0 — ns tDW Data Valid to End-of-Write 15 — 30 — 40 — ns tHZ Output High-Z Time (1, 2) —15—25 —30 ns tDH Data Hold Time (4) 0— 0— 0— ns tWZ Write Enable to Output in High-Z (1, 2) —15—25 —30 ns tOW Output Active from End-of-Write (1, 2, 4) 0— 0— 0— ns tSWRD SEM Flag Write to Read Time 5 — 5 — 5 — ns tSPS SEM Flag Contention Window 5 — 5 — 5 — ns NOTES: 2683 tbl 14 1. Transition is measured ±500mV from Low or High-impedance voltage with the Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM = VIL. Either condition must be valid for the entire tEW time. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 5. "X" in part numbers indicates power rating (S or L). |
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