6.31

10

IDT70825S/L

HIGH-SPEED 8K x 16 SEQUENTIAL ACCESS RANDOM ACCESS MEMORY

MILITARY AND COMMERCIAL TEMPERATURE RANGES

Flag Status Bit 0, (Bit 1)

Functional Description

0

Clears Buffer Flag

1

NOTES:

3016 tbl 18

1. Either bit 0 or bit 1, or both bits, may be changed simultaneously. One may be cleared while the second is left alone or cleared.

2. Remains as it was prior to the

CMD operation, either HIGH (1) or LOW (0).

End of buffer flag for Buffer #1

End of buffer flag for Buffer #2

15

0

MSB

H

H

H

H

HH

H

H

HH

H

H

H

1

0

LSB I/O BITS

H

3016 drw 12

NOTE:

Buffer #1 flow control

Buffer #2 flow control

Counter Release

(STOP Mode Only)

15

MSB

LSB I/O BITS

0

H

HH

H

H

HH

4

3

2

1

0

HH

H

H

3016 drw 11

3016 tbl 17

FLOW CONTROL BITS

Flow Control Bits

Bit 1 & Bit 0

Mode

(Bit 3 & Bit 2)

Functional Description

00

BUFFER

CHAINING

01

STOP

The address pointer will stop incrementing when it reaches the next address (

EOB address + 1), if

CNTEN is Low on the next clock's rising edge. Otherwise, the address pointer will stop incrementing on

EOB. Sequential write operations are inhibited after the address pointer is stopped. The pointer can be

10

LINEAR

11

MASK

although the flag status bits will be set. The pointer keeps incrementing for further operations.

NOTES:

1.

2.

CMD Flow Control bits are unchanged, the count does not continue advancement.

3. If

4. If counter has stopped at EOBx and was released by bit 4 of the flow control register,

CNTEN must be LOW on the next rising edge of SCLK otherwise

the flow control will remain in the STOP mode.

3016 tbl 19

Flag Status Bit 0, (Bit 1) Functional Description

0

Pointer has not reached the End of the

Buffer.

1

Pointer has reached the End of the Buffer.

CASE 7: FLAG STATUS REGISTER READ CONDITIONS

NOTES:

2. Writing a 0 into bit 4 releases the address pointer after it is stopped due to the STOP mode and allows sequential write operations to resume. This occurs

asynchronously of SCLK, and therefore caution should be taken. The pointer will be at address EOB+2 on the next rising edge of SCLK that is enabled

by

CNTEN. The pointer is also released by RST, SLD, SSTRT1 and SSTRT2 operations.