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IDT7016S15J Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT7016S15J Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 20 page 6.13 2 IDT7016S/L HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES Left Port Right Port Names CEL CER Chip Enable R/ WL R/ WR Read/Write Enable OEL OER Output Enable A0L – A13L A0R – A13R Address I/O0L – I/O8L I/O0R – I/O8R Data Input/Output SEML SEMR Semaphore Enable INTL INTR Interrupt Flag BUSYL BUSYR Busy Flag M/ S Master or Slave Select VCC Power GND Ground Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit or wider memory system applications results in full- speed, error-free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technol- ogy, these devices typically operate on only 750mW of power. The IDT7016 is packaged in a ceramic 68-pin PGA, a 64- pin PLCC and an 80-pin TQFP (Thin Quad FlatPack). Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. PIN CONFIGURATIONS(1,2) NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. This text does not imply orientation of Part-Mark. PIN NAMES 3190 tbl 01 3190 drw 02 12 13 14 15 16 17 18 INDEX 19 20 21 22 987 6543 21 68 67 66 65 27 28 29 30 31 32 33 34 35 36 37 38 39 VCC I/O1R I/O2R I/O3R I/O4R INTL GND A4L A3L A2L A1L A0L A3R A0R A1R A2R I/O2L A5L 11 10 M/ S 23 24 25 26 40 41 42 43 58 57 56 55 54 53 52 51 50 49 48 59 60 47 46 45 44 64 63 62 61 I/O3L GND I/O0R VCC A4R BUSYL GND BUSYR INTR IDT7016 J68-1 PLCC TOP VIEW(3) I/O4L I/O5L I/O6L I/O7L I/O5R I/O6R |
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