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MK2754STR Datasheet(PDF) 3 Page - Integrated Circuit Systems |
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MK2754STR Datasheet(HTML) 3 Page - Integrated Circuit Systems |
3 / 4 page MK2754 Low Cost 54 MHz VCXO MDS 2754 B 3 Revision 011698 Printed 11/16/00 MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax I C R O C LOC K Parameter Conditions Minimum Typical Maximum Units ABSOLUTE MAXIMUM RATINGS (note 1) ABSOLUTE MAXIMUM RATINGS (note 1) Supply voltage, VDD Referenced to GND 7 V Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V Ambient Operating Temperature 0 70 °C Soldering Temperature Max of 10 seconds 260 °C Storage temperature -65 150 °C DC CHARACTERISTICS (VDD = 5.0V unless noted) DC CHARACTERISTICS (VDD = 5.0V unless noted) Operating Voltage, VDD 4.75 5.25 V Output High Voltage, VOH IOH=-25mA 2.4 V Output Low Voltage, VOL IOL=25mA 0.4 V Output High Voltage, VOH, CMOS level IOH=-8mA VDD-0.4 V Operating Supply Current, IDD No Load 20 mA Short Circuit Current ±100 mA VIN, VCXO control voltage 0 3 V AC CHARACTERISTICS (VDD = 5.0V unless noted) AC CHARACTERISTICS (VDD = 5.0V unless noted) Input Crystal Frequency 13.50000 MHz Input Crystal Accuracy ±30 ppm Output Clock Rise Time 0.8 to 2.0V 1.5 ns Output Clock Fall Time 2.0 to 0.8V 1.5 ns Output Clock Duty Cycle At 1.4V 40 50 60 % Maximum Absolute Jitter, short term 200 ps 54 MHz output pullability, note 2 0V ≤ VIN ≤ 3V ±100 ppm Electrical Specifications Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. 2. With a MicroClock approved pullable crystal. External Components The MK2754 requires a minimum number of external components for proper operation. A decoupling capacitor of 0.1µF should be connected between VDD and GND on pins 2 and 4, as close to the MK2754 as possible. A series termination resistor of 33 Ω may be used for the clock output. The input crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode, pullable, AT cut, 13.5MHz, with 14pF load capacitance. Consult MicroClock for recommended suppliers. IMPORTANT - read application note MAN05 before laying out the PCB. |
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