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ICS9248YF-110 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS9248YF-110 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 14 page Integrated Circuit Systems, Inc. ICS9248-110 Third party brands and names are the property of their respective owners. Block Diagram 9248-110 Rev C 01/08/01 Functionality Pin Configuration 48-Pin 300mil SSOP Recommended Application: AMD-K7 based systems Output Features: • 3 differential pair open drain CPU clocks (2.7V external pull-up; up to 150MHz achieviable through I 2C) • 2 - AGPCLK @ 3.3V • 8 - PCI @3.3V, including 1 free running • 1 - 48MHz @ 3.3V • 1 - 24/48MHz @ 3.3V • 2- REF @3.3V, 14.318MHz. Features: • Up to 150MHz frequency support • Support power management: CPU, PCI, stop and Power down Mode from I 2C programming. • Spread spectrum for EMI control -0.5% down spread • Uses external 14.318MHz crystal • FS pins for frequency select Key Specifications: • CPU – CPU: <250ps • AGP-AGP: <250ps • PCI – PCI: <400ps • CPU - SDRAM_OUT: <400ps • CPU-AGP <250ps AMD-K7TM System Clock Chip * Internal 120K pullup resistor on indicated inputs ** Internal 240K pullup resistor on indicated inputs **FS0/REF0 **FS1/REF1 GNDREF X1 X2 GNDPCI PCICLK_F PCICLK0 VDDPCI PCICLK1 PCICLK2 GNDPCI PCICLK3 PCICLK4 VDDPCI PCICLK5 PCICLK6 VDDAGP AGP0 AGP1 GNDAGP VDD48 48MHz SEL24_48#/24-48MHz VDDREF GNDSD SDRAM_OUT VDDSD RESERVED CPUCLKC2 CPUCLKT2 GNDCPU CUCLKC1 CPUCLKT1 GND CPUCLKC0 CPUCLKT0 RESERVED VDD GND PCI_STOP# CPU_STOP PD# SPREAD# FS2* SDATA SCLK GND48 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 FS (2:0) SPREAD# CPU_STOP# X1 X2 OSC PLL CPU STOP PLL2 REF (1:0) CPUCLKC (2:0) CPUCLKT (2:0) SDRAM_OUT 48MHz PCICLK (6:0) 24_48MHz PCICLK_F PCI_STOP# SEL24_48# PD# / 2 / 3 PCI STOP X 2 / 2 AGP (1:0) 0 0 0 90 30.00 60.00 0 0 1 95 31.67 63.33 0 1 0 100.99 33.66 67.33 0 1 1 115 38.33 76.67 1 0 0 100.7 33.57 67.13 1 0 1 103 34.33 68.67 1 1 0 105 35.00 70.00 1 1 1 110 36.67 73.33 PCI AGP FS2 FS1 FS0 CPU, SDRAM ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. |
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