4

ICS169C-40

Electrical Characteristics at 3.3V

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

AC Characteristics

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Tr1

15pF load, 0.4 to 2.0V; VDD=VDDL

for All Outputs

-0.9

1.4

ns

Tf1

15pF load, 2.0 to 0.4V; VDD=VDDL

for All Outputs

-

0.8

1.2

ns

Tr2

15pF load, 0.4 to 2.0V; VDDL=2.5V &

VDD = 2.3V; CPU

-1.5

2.0

ns

Tf2

15pF load, 2.0 to 0.4V; VDDL=2.5V &

VDD = 3.3V; CPU

-

1.4

2.0

ns

Dt

15pF load CPU, PCI, REF @

VOUT=1.5V

45

50

55

%

Dt

15pF load; VDDL (1:2)=2.5V

VTH=1.25V

45

49

55

%

Tj1s1

CPU & PCI Clocks; Load=15pF,

VDD=VDDL

-

50

150

ps

Tjab1

CPU & PCI Clocks; Load=15pF,

VDD=VDDL

-220

-

220

ps

Tj1s2

Ref; Load=15pF

-

200

300

ps

Tjab2

Ref Load=15pF

-500

-

500

ps

Jitter, Cycle to Cycle

(for CPU only)

VDD=VDDL; @ 60MHz

-400

-

+400

ps

VDD=VDDL; @ 66MHz

-350

-

350

ps

VDD=VDDL; @ 75MHz

-250

-

250

ps

VDD=3.3V; VDDL=2.5;

for All Frequencies

400

-

400

ps

Fi

12.0

14.318

16.0

MHz

CIN

Logic input pins

-

5

-

pF

Crystal Oscillator

CINX

X1, X2 pins

-

18

-

pF

ton

From VDD=1.6V to 1st crossing of 66.6

MHz VDD supply ramp < 40ms

-2.5

4.5

ms

ts

From 1st crossing of acquisition to <

1% settling

-1.8

2.0

ms

Tsk1

CPU to CPU & PCI to PCI; Load=15pF;

@1.5V

-250

14.5

250

ps

Tsk2

CPU to PCI; Load=15pF; @1.5V;

VDD=VDDL; CPU is early

1.0

2.0

4.0

ns

Tsk3

CPU to PCI; Load=15pF; (CPU is early)

VDDL=2.5V, VTH=1.25V;

VDD=3.3V, VTH=1.5V

0.50

1.5

3.0

ns