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ICS9169C-40 Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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ICS9169C-40 Datasheet(HTML) 4 Page - Integrated Circuit Systems |
4 / 6 page 4 ICS169C-40 Electrical Characteristics at 3.3V VDD = 3.0 3.7V, TA = 0 70 ° C unless otherwise stated Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production. AC Characteristics PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Rise Time1 Tr1 15pF load, 0.4 to 2.0V; VDD=VDDL for All Outputs -0.9 1.4 ns Fall Time1 Tf1 15pF load, 2.0 to 0.4V; VDD=VDDL for All Outputs - 0.8 1.2 ns Rise Time1 Tr2 15pF load, 0.4 to 2.0V; VDDL=2.5V & VDD = 2.3V; CPU -1.5 2.0 ns Fall Time1 Tf2 15pF load, 2.0 to 0.4V; VDDL=2.5V & VDD = 3.3V; CPU - 1.4 2.0 ns Duty Cycle1 Dt 15pF load CPU, PCI, REF @ VOUT=1.5V 45 50 55 % Duty Cycle1 Dt 15pF load; VDDL (1:2)=2.5V VTH=1.25V 45 49 55 % Jitter, One Sigma1 Tj1s1 CPU & PCI Clocks; Load=15pF, VDD=VDDL - 50 150 ps Jitter, Absolute1 Tjab1 CPU & PCI Clocks; Load=15pF, VDD=VDDL -220 - 220 ps Jitter, One Sigma1 Tj1s2 Ref; Load=15pF - 200 300 ps Jitter, Absolute1 Tjab2 Ref Load=15pF -500 - 500 ps Jitter, Cycle to Cycle (for CPU only) TCC VDD=VDDL; @ 60MHz -400 - +400 ps VDD=VDDL; @ 66MHz -350 - 350 ps VDD=VDDL; @ 75MHz -250 - 250 ps VDD=3.3V; VDDL=2.5; for All Frequencies 400 - 400 ps Input Frequency1 Fi 12.0 14.318 16.0 MHz Logic Input Capacitance1 CIN Logic input pins - 5 - pF Crystal Oscillator Capacitance1 CINX X1, X2 pins - 18 - pF Power-on Time1 ton From VDD=1.6V to 1st crossing of 66.6 MHz VDD supply ramp < 40ms -2.5 4.5 ms Frequency Settling Time1 ts From 1st crossing of acquisition to < 1% settling -1.8 2.0 ms Clock Skew Window1 Tsk1 CPU to CPU & PCI to PCI; Load=15pF; @1.5V -250 14.5 250 ps Clock Skew1 Tsk2 CPU to PCI; Load=15pF; @1.5V; VDD=VDDL; CPU is early 1.0 2.0 4.0 ns Clock Skew1 Tsk3 CPU to PCI; Load=15pF; (CPU is early) VDDL=2.5V, VTH=1.25V; VDD=3.3V, VTH=1.5V 0.50 1.5 3.0 ns |
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