Integrated

Circuit

Systems, Inc.

General Description

Features

ICS9158-05

Block Diagram

9158-05 Rev B 05/08/97

Applications

The ICS9158-05 is a low cost frequency generator designed

specifically to clock Pentium systems using the Triton chip

set. Three copies of the CPU clock are available at 50, 60, or

66.7 MHz. Five copies of the synchronous BUS clock run at

half the CPU frequency. A 14.318 MHz REFCLK, 12 MHz,

KEYBD, and 24 MHz FLOPPY clock are also provided.

Each high drive output is capable of driving a 30pF load with

better than 1V/ns typical slew and have a duty cycle of 50±5%.

The synchronous outputs are skew controlled to within±250ps

and CPU clocks lead BUS clocks by 2-5ns.

Glitch-free start and stop of the CPU and BUS clocks is

provided as well as a power-down mode with all clocks forced

low and the internal oscillators and PLLs powered-down.

Power-up time is less than 10ns. All frequency transitions are

gradual and meet the Intel cycle-to-cycle timing specification

for 486 and Pentium microprocessors.

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3 CPU and 5 synchronous BUS clocks

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50/60/66 MHz and glitch-free stop clock selections

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±250ps skew between all synchronous outputs

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Outputs drive up to 30pF load with 1V/ns slew

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2-5ns early CPU clocks support Triton chip set

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Compatible with 486 and Pentium CPUs

•

Consumes less than 10µA in power-down mode

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On-chip loop filter components

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3.0V - 5.5V supply range

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24-pin SOIC package

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Ideal for RISC or CISC systems such as 486, Pentium,

PowerPC,™ etc. requiring multiple CPU and

synchronous BUS clocks.

Buffered Clock Generator for Pentium™ /Triton™ Systems

Advanced Information

Pentium and Triton are trademarks of Intel Corporation.

PowerPC is a trademark of Motorola Corporation

ADVANCE INFORMATION documents contain information on

new products in the sampling or preproduction phase of devel-

opment. Characteristic data and other specifications are subject to

change without notice.