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ICS502MIT Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS502MIT Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 4 page ICS502 LOCO™ PLL Clock Multiplier MDS 502 D 1 Revision 111000 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com • Packaged as 8 pin SOIC or die • ICS’ lowest cost PLL clock plus reference • Zero ppm multiplication error • Easy to cascade with other 5xx series • Input crystal frequency of 5 - 27 MHz • Input clock frequency of 2 - 50 MHz • Output clock frequencies up to 160 MHz • Low jitter - 50 ps one sigma • Compatible with all popular CPUs • Duty cycle of 45/55 up to 160 MHz • Operating voltages of 3.0 to 5.5V • Industrial temperature version available • 25mA drive capability at TTL levels • Advanced, low power CMOS process The ICS502 LOCO™ is the most cost effective way to generate a high quality, high frequency clock output and a reference from a low frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip’s ROM is the ability to generate 6 different multiplication factors, allowing one chip to output many common frequencies (see page 2). Block Diagram Description Features CLK Crystal Oscillator VDD GND PLL Clock Synthesis and Control Circuitry Output Buffer crystal or clock REF X2 X1/ICLK Output Buffer S1, S0 2 |
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