HY51V18163HGT-7 datasheet(8/12 Pages) HYNIX

Part #	HY51V18163HGT-7

Description	1M x 16Bit EDO DRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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HY51V(S)18163HG/HGL

Rev.0.1/Apr.01

8

Write Cycle

Read-Modify-Write Cycle

Refresh cycle

Parameter

Symbol

-50

-60

-70

Unit

Note

Min

Max

Min

Max

Min

Max

Write command set-up time

tWCS

0

-

0

-

0

-

ns

14,21

Write command hold time

tWCH

8

-

10

-

13

-

ns

21

Write command pulse width

tWP

8

-

10

-

10

-

ns

Write command to /RAS lead time

tRWL

8

-

10

-

13

-

ns

Write command to /CAS lead time

tCWL

8

-

10

-

13

-

ns

23

Data-in set-up time

tDS

0

-

0

-

0

-

ns

15,23

Data-in hold time

tDH

8

-

10

-

13

-

ns

15,23

Parameter

Symbol

-50

-60

-70

Unit

Note

Min

Max

Min

Max

Min

Max

Read-modify-write cycle time

tRWC

111

-

136

-

161

-

ns

/RAS to /WE delay time

tRWD

67

-

79

-

92

-

ns

14

/CAS to /WE delay time

tCWD

30

-

34

-

40

-

ns

14

Column address to /WE delay time

tAWD

42

-

49

-

57

-

ns

14

/OE hold time from /WE

tOEH

13

-

15

-

18

-

ns

Parameter

Symbol

-50

-60

-70

Unit

Note

Min

Max

Min

Max

Min

Max

/CAS set-up time

( /CAS-before-/RAS Refresh Cycle)

tCSR

5

-

5

-

5

-

ns

21

/CAS hold time

( /CAS-before-/RAS Refresh Cycle)

tCHR

8

-

10

-

10

-

ns

22

/RAS precharge to /CAS hold time

( /CAS-before-/RAS Refresh Cycle)

tRPC

5

-

5

-

5

-

ns

21

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