1

Features

– Data Sheet Describes Mode 0 Operation

–2.7 (V

– Protect 1/4, 1/2, or Entire Array

Data Protection

– Endurance: 1 Million Write Cycles

– Data Retention: >100 Years

Description

The AT25128A/256A provides 131,072/262,144 bits of serial electrically-erasable pro-

grammable read-only memory (EEPROM) organized as 16,384/32,768 words of 8 bits

each. The device is optimized for use in many industrial and automotive applications

where low-power and low-voltage operation are essential. The devices are available in

space-saving 8-lead JEDEC SOIC and 8-lead TSSOP packages.

The AT25128A/256A is enabled through the Chip Select pin (CS) and accessed via a

three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and

Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-

rate erase cycle is required before write.

Table 1. Pin Configurations

Pin Name

Function

CS

Chip Select

SCK

Serial Data Clock

SI

Serial Data Input

SO

Serial Data Output

GND

Ground

VCC

Power Supply

WP

Write Protect

HOLD

Suspends Serial Input

NC

No Connect

DC

Don't Connect

5088F–SEEPR–2/07

SPI

Automotive

Temperature

Serial

EEPROMs

128K (16,384 x 8)

256K (32,768 x 8)

AT25128A

AT25256A

Not Recommended

for New Design.

Replaced by

AT25128B/256B

Automotive.

1

2

3

4

8

7

6

5

8-lead SOIC

1

2

3

4

8

7

6

5

8-lead TSSOP

CS

SO

WP

GND

VCC

HOLD

SCK

SI

CS

SO

WP

GND

VCC

HOLD

SCK

SI