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74VHC112MX Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74VHC112MX Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page tm May 2007 ©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC112 Rev. 1.2 74VHC112 Dual J-K Flip-Flops with Preset and Clear Features ■ High speed: fMAX = 200MHz (Typ.) at VCC = 5.0V ■ Low power dissipation: ICC = 2µA (Max.) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (Min.) ■ Power down protection is provided on all inputs ■ Pin and function compatible with 74HC112 General Description The VHC112 is an advanced high speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHC112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to transition time. The J and K inputs can change when the clock is in either state with- out affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. The LOW signal on PR or CLR prevents clocking and forces Q and Q HIGH, respectively. Simultaneous LOW signals on PR and CLR force both Q and Q HIGH. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Order Number Package Number Package Description 74VHC112M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC112SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC112MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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Similar Description - 74VHC112MX |
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